Preparing Renormalization Group Fixed Points on NISQ Hardware

• URL: http://arxiv.org/abs/2109.09787v1
• Date: Mon, 20 Sep 2021 18:35:11 GMT
• Title: Preparing Renormalization Group Fixed Points on NISQ Hardware
• Authors: Troy J. Sewell and Stephen P. Jordan
• Abstract summary: We numerically and experimentally study the robust preparation of the ground state of the critical Ising model using circuits adapted from the work of Evenbly and White. The experimental implementation exhibits self-correction through renormalization seen in the convergence and stability of local observables. We also numerically test error mitigation by zero-noise extrapolation schemes specially adapted for renormalization circuits.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Noisy intermediate-scale quantum (NISQ) hardware is typically limited to low-depth quantum circuits to limit the number of opportunities for introduction of error by unreliable quantum gates. A less-explored alternative approach is to repeatedly apply a quantum channel with a desired quantum state as a stable fixed point. Increased circuit depth can in this case be beneficial rather than harmful due to dissipative self-correction. The quantum channels constructed from MERA circuits can be interpreted in terms of the renormalization group(RG), and their fixed points are RG fixed points, i.e. scale-invariant systems such as conformal field theories. Here, building upon the theoretical proposal of Kim and Swingle, we numerically and experimentally study the robust preparation of the ground state of the critical Ising model using circuits adapted from the work of Evenbly and White. The experimental implementation exhibits self-correction through renormalization seen in the convergence and stability of local observables, and makes essential use of the ability to measure and reset individual qubits afforded by the "quantum CCD" architecture of the Honeywell ion-trap. We also numerically test error mitigation by zero-noise extrapolation schemes specially adapted for renormalization circuits, which are able to outperform typical extrapolation schemes using lower gate overhead.

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