TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans
- URL: http://arxiv.org/abs/2405.05590v1
- Date: Thu, 9 May 2024 07:25:38 GMT
- Title: TroLLoc: Logic Locking and Layout Hardening for IC Security Closure against Hardware Trojans
- Authors: Fangzhou Wang, Qijing Wang, Lilas Alrahis, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Ozgur Sinanoglu, Tsung-Yi Ho, Evangeline F. Y. Young, Johann Knechtel,
- Abstract summary: TroLLoc is a novel scheme for IC security closure that employs, for the first time, logic locking and layout hardening in unison.
We show that TroLLoc successfully renders layouts resilient, with reasonable overheads, against (i.e., general prospects for Trojan insertion as in the ISPD'22 contest, (ii) actual Trojan insertion as in the ISPD'23 contest, and (iii) potential second-order attacks.
- Score: 21.7375312616769
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Due to cost benefits, supply chains of integrated circuits (ICs) are largely outsourced nowadays. However, passing ICs through various third-party providers gives rise to many security threats, like piracy of IC intellectual property or insertion of hardware Trojans, i.e., malicious circuit modifications. In this work, we proactively and systematically protect the physical layouts of ICs against post-design insertion of Trojans. Toward that end, we propose TroLLoc, a novel scheme for IC security closure that employs, for the first time, logic locking and layout hardening in unison. TroLLoc is fully integrated into a commercial-grade design flow, and TroLLoc is shown to be effective, efficient, and robust. Our work provides in-depth layout and security analysis considering the challenging benchmarks of the ISPD'22/23 contests for security closure. We show that TroLLoc successfully renders layouts resilient, with reasonable overheads, against (i) general prospects for Trojan insertion as in the ISPD'22 contest, (ii) actual Trojan insertion as in the ISPD'23 contest, and (iii) potential second-order attacks where adversaries would first (i.e., before Trojan insertion) try to bypass the locking defense, e.g., using advanced machine learning attacks. Finally, we release all our artifacts for independent verification [2].
Related papers
- Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans [4.549209593575401]
We introduce a new class of hardware trojans called interrupt-resilient trojans (IRTs)
IRTs can successfully address the problem of non-deterministic triggering in CPUs.
We show that our design allows for seamless integration during fabrication stage attacks.
arXiv Detail & Related papers (2024-03-15T19:55:23Z) - SCARF: Securing Chips with a Robust Framework against Fabrication-time Hardware Trojans [1.8980236415886387]
Hardware Trojans (HTs) can be introduced during IC fabrication.
We propose a comprehensive approach to enhance IC security from front-end to back-end stages of design.
arXiv Detail & Related papers (2024-02-19T14:18:08Z) - Design for Assurance: Employing Functional Verification Tools for Thwarting Hardware Trojan Threat in 3PIPs [13.216074408064117]
Third-party intellectual property cores are essential building blocks of modern system-on-chip and integrated circuit designs.
These design components usually come from vendors of different trust levels and may contain undocumented design functionality.
We develop a method for identifying and preventing hardware Trojans, employing functional verification tools and languages familiar to hardware designers.
arXiv Detail & Related papers (2023-11-21T03:32:07Z) - TrojanNet: Detecting Trojans in Quantum Circuits using Machine Learning [5.444459446244819]
TrojanNet is a novel approach to enhance the security of quantum circuits by detecting and classifying Trojan-inserted circuits.
We generate 12 diverse datasets by introducing variations in Trojan gate types, the number of gates, insertion locations, and compilers.
Experimental results showcase an average accuracy of 98.80% and an average F1-score of 98.53% in effectively detecting and classifying Trojan-inserted QAOA circuits.
arXiv Detail & Related papers (2023-06-29T05:56:05Z) - Security Closure of IC Layouts Against Hardware Trojans [18.509106432984094]
We propose a multiplexer-based logic-locking scheme that is (i) devised for layout-level Trojan prevention, (ii) resilient against state-of-the-art, oracle-less machine learning attacks, and (iii) fully integrated into a tailored, yet generic, commercial-grade design flow.
We show that ours can render layouts resilient, with reasonable overheads, against Trojan insertion in general and also against second-order attacks (i.e., adversaries seeking to bypass the locking defense in an oracle-less setting)
arXiv Detail & Related papers (2022-11-15T09:17:49Z) - Attention Hijacking in Trojan Transformers [68.04317938014067]
Trojan attacks pose a severe threat to AI systems.
Recent works on Transformer models received explosive popularity.
Can we reveal the Trojans through attention mechanisms in BERTs and ViTs?
arXiv Detail & Related papers (2022-08-09T04:05:04Z) - Hardly Perceptible Trojan Attack against Neural Networks with Bit Flips [51.17948837118876]
We present hardly perceptible Trojan attack (HPT)
HPT crafts hardly perceptible Trojan images by utilizing the additive noise and per pixel flow field.
To achieve superior attack performance, we propose to jointly optimize bit flips, additive noise, and flow field.
arXiv Detail & Related papers (2022-07-27T09:56:17Z) - Quarantine: Sparsity Can Uncover the Trojan Attack Trigger for Free [126.15842954405929]
Trojan attacks threaten deep neural networks (DNNs) by poisoning them to behave normally on most samples, yet to produce manipulated results for inputs attached with a trigger.
We propose a novel Trojan network detection regime: first locating a "winning Trojan lottery ticket" which preserves nearly full Trojan information yet only chance-level performance on clean inputs; then recovering the trigger embedded in this already isolated subnetwork.
arXiv Detail & Related papers (2022-05-24T06:33:31Z) - Towards Effective and Robust Neural Trojan Defenses via Input Filtering [67.01177442955522]
Trojan attacks on deep neural networks are both dangerous and surreptitious.
Over the past few years, Trojan attacks have advanced from using only a simple trigger and targeting only one class to using many sophisticated triggers and targeting multiple classes.
Most defense methods still make out-of-date assumptions about Trojan triggers and target classes, thus, can be easily circumvented by modern Trojan attacks.
arXiv Detail & Related papers (2022-02-24T15:41:37Z) - Odyssey: Creation, Analysis and Detection of Trojan Models [91.13959405645959]
Trojan attacks interfere with the training pipeline by inserting triggers into some of the training samples and trains the model to act maliciously only for samples that contain the trigger.
Existing Trojan detectors make strong assumptions about the types of triggers and attacks.
We propose a detector that is based on the analysis of the intrinsic properties; that are affected due to the Trojaning process.
arXiv Detail & Related papers (2020-07-16T06:55:00Z) - An Embarrassingly Simple Approach for Trojan Attack in Deep Neural
Networks [59.42357806777537]
trojan attack aims to attack deployed deep neural networks (DNNs) relying on hidden trigger patterns inserted by hackers.
We propose a training-free attack approach which is different from previous work, in which trojaned behaviors are injected by retraining model on a poisoned dataset.
The proposed TrojanNet has several nice properties including (1) it activates by tiny trigger patterns and keeps silent for other signals, (2) it is model-agnostic and could be injected into most DNNs, dramatically expanding its attack scenarios, and (3) the training-free mechanism saves massive training efforts compared to conventional trojan attack methods.
arXiv Detail & Related papers (2020-06-15T04:58:28Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.