A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
- URL: http://arxiv.org/abs/2503.01561v1
- Date: Mon, 03 Mar 2025 14:06:43 GMT
- Title: A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
- Authors: Muhammad Ihsan Al Hafiz, Naresh Ravichandran, Anders Lansner, Pawel Herman, Artur Podobas,
- Abstract summary: Brain-inspired algorithms are attractive and emerging alternatives to classical deep learning methods.<n>BCPNN is an important tool for both machine learning and computational neuroscience research.<n>BCPNN can reach state-of-the-art performance in tasks such as learning and memory recall compared to other models.<n>We design a custom stream-based accelerator for BCPNN using Field-Programmable Gate Arrays (FPGA) using Xilinx Vitis High-Level Synthesis (HLS) flow.
- Score: 0.0
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: Brain-inspired algorithms are attractive and emerging alternatives to classical deep learning methods for use in various machine learning applications. Brain-inspired systems can feature local learning rules, both unsupervised/semi-supervised learning and different types of plasticity (structural/synaptic), allowing them to potentially be faster and more energy-efficient than traditional machine learning alternatives. Among the more salient brain-inspired algorithms are Bayesian Confidence Propagation Neural Networks (BCPNNs). BCPNN is an important tool for both machine learning and computational neuroscience research, and recent work shows that BCPNN can reach state-of-the-art performance in tasks such as learning and memory recall compared to other models. Unfortunately, BCPNN is primarily executed on slow general-purpose processors (CPUs) or power-hungry graphics processing units (GPUs), reducing the applicability of using BCPNN in (among others) Edge systems. In this work, we design a custom stream-based accelerator for BCPNN using Field-Programmable Gate Arrays (FPGA) using Xilinx Vitis High-Level Synthesis (HLS) flow. Furthermore, we model our accelerator's performance using first principles, and we empirically show that our proposed accelerator is between 1.3x - 5.3x faster than an Nvidia A100 GPU while at the same time consuming between 2.62x - 3.19x less power and 5.8x - 16.5x less energy without any degradation in performance.
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