Hardware.jl - An MLIR-based Julia HLS Flow (Work in Progress)

• URL: http://arxiv.org/abs/2503.09463v1
• Date: Wed, 12 Mar 2025 15:12:12 GMT
• Title: Hardware.jl - An MLIR-based Julia HLS Flow (Work in Progress)
• Authors: Benedict Short, Ian McInerney, John Wickerson,
• Abstract summary: We are developing a reusable end-to-end compiler toolchain for the Julia language.<n>This unifies accelerator and algorithm development by automatically synthesising Julia source code into high-performance Verilog.
• Score: 1.2152813244704233
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Co-developing scientific algorithms and hardware accelerators requires domain-specific knowledge and large engineering resources. This leads to a slow development pace and high project complexity, which creates a barrier to entry that is too high for the majority of developers to overcome. We are developing a reusable end-to-end compiler toolchain for the Julia language entirely built on permissively-licensed open-source projects. This unifies accelerator and algorithm development by automatically synthesising Julia source code into high-performance Verilog.

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