One Step Beyond: Feedthrough & Placement-Aware Rectilinear Floorplanner

• URL: http://arxiv.org/abs/2507.14914v1
• Date: Sun, 20 Jul 2025 11:00:18 GMT
• Title: One Step Beyond: Feedthrough & Placement-Aware Rectilinear Floorplanner
• Abstract summary: Floorplanning determines the shapes and locations of modules on a chip canvas.<n>Current floorplanning approaches fail to integrate with subsequent physical design stages.<n>We propose Flora, a three-stage feedthrough and placement aware rectilinear floorplanner.
• Score: 35.39679825578791
• License: http://creativecommons.org/licenses/by-nc-sa/4.0/
• Abstract: Floorplanning determines the shapes and locations of modules on a chip canvas and plays a critical role in optimizing the chip's Power, Performance, and Area (PPA) metrics. However, existing floorplanning approaches often fail to integrate with subsequent physical design stages, leading to suboptimal in-module component placement and excessive inter-module feedthrough. To tackle this challenge, we propose Flora, a three-stage feedthrough and placement aware rectilinear floorplanner. In the first stage, Flora employs wiremask and position mask techniques to achieve coarse-grained optimization of HPWL and feedthrough. In the second stage, under the constraint of a fixed outline, Flora achieves a zero-whitespace layout by locally resizing module shapes, thereby performing fine-grained optimization of feedthrough and improving component placement. In the third stage, Flora utilizes a fast tree search-based method to efficiently place components-including macros and standard cells-within each module, subsequently adjusting module boundaries based on the placement results to enable cross-stage optimization. Experimental results show that Flora outperforms recent state-of-the-art floorplanning approaches, achieving an average reduction of 6% in HPWL, 5.16% in FTpin, 29.15% in FTmod, and a 14% improvement in component placement performance.

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