LLMs for Analog Circuit Design Continuum (ACDC)

• URL: http://arxiv.org/abs/2512.09199v1
• Date: Tue, 09 Dec 2025 23:57:28 GMT
• Title: LLMs for Analog Circuit Design Continuum (ACDC)
• Authors: Yasaman Esfandiari, Jocelyn Rego, Austin Meyer, Jonathan Gallagher, Mia Levy,
• Abstract summary: Large Language Models (LLMs) and transformer architectures have shown impressive reasoning and generation capabilities.<n>This work focuses on AI-assisted design where humans remain in the loop.<n>Our results highlight key reliability challenges, including sensitivity to data format, instability in generated designs, and limited generalization to unseen circuit configurations.
• Score: 10.15990970510281
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Large Language Models (LLMs) and transformer architectures have shown impressive reasoning and generation capabilities across diverse natural language tasks. However, their reliability and robustness in real-world engineering domains remain largely unexplored, limiting their practical utility in human-centric workflows. In this work, we investigate the applicability and consistency of LLMs for analog circuit design -- a task requiring domain-specific reasoning, adherence to physical constraints, and structured representations -- focusing on AI-assisted design where humans remain in the loop. We study how different data representations influence model behavior and compare smaller models (e.g., T5, GPT-2) with larger foundation models (e.g., Mistral-7B, GPT-oss-20B) under varying training conditions. Our results highlight key reliability challenges, including sensitivity to data format, instability in generated designs, and limited generalization to unseen circuit configurations. These findings provide early evidence on the limits and potential of LLMs as tools to enhance human capabilities in complex engineering tasks, offering insights into designing reliable, deployable foundation models for structured, real-world applications.

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