Primitive-Driven Acceleration of Hyperdimensional Computing for Real-Time Image Classification

• URL: http://arxiv.org/abs/2601.20061v1
• Date: Tue, 27 Jan 2026 21:12:56 GMT
• Title: Primitive-Driven Acceleration of Hyperdimensional Computing for Real-Time Image Classification
• Authors: Dhruv Parikh, Jebacyril Arockiaraj, Viktor Prasanna,
• Abstract summary: We develop an image-encoding algorithm that maps local image patches to hypervectors enriched with spatial information.<n>These patch-level hypervectors are then merged into a global representation using the fundamental HDC operations.<n>This encoder achieves 95.67% accuracy on MNIST and 85.14% on Fashion-MNIST, outperforming prior HDC-based image encoders.
• Score: 0.07646713951724012
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Hyperdimensional Computing (HDC) represents data using extremely high-dimensional, low-precision vectors, termed hypervectors (HVs), and performs learning and inference through lightweight, noise-tolerant operations. However, the high dimensionality, sparsity, and repeated data movement involved in HDC make these computations difficult to accelerate efficiently on conventional processors. As a result, executing core HDC operations: binding, permutation, bundling, and similarity search: on CPUs or GPUs often leads to suboptimal utilization, memory bottlenecks, and limits on real-time performance. In this paper, our contributions are two-fold. First, we develop an image-encoding algorithm that, similar in spirit to convolutional neural networks, maps local image patches to hypervectors enriched with spatial information. These patch-level hypervectors are then merged into a global representation using the fundamental HDC operations, enabling spatially sensitive and robust image encoding. This encoder achieves 95.67% accuracy on MNIST and 85.14% on Fashion-MNIST, outperforming prior HDC-based image encoders. Second, we design an end-to-end accelerator that implements these compute operations on an FPGA through a pipelined architecture that exploits parallelism both across the hypervector dimensionality and across the set of image patches. Our Alveo U280 implementation delivers 0.09ms inference latency, achieving up to 1300x and 60x speedup over state-of-the-art CPU and GPU baselines, respectively.

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