Hexagon-MLIR: An AI Compilation Stack For Qualcomm's Neural Processing Units (NPUs)

• URL: http://arxiv.org/abs/2602.19762v1
• Date: Mon, 23 Feb 2026 12:12:39 GMT
• Title: Hexagon-MLIR: An AI Compilation Stack For Qualcomm's Neural Processing Units (NPUs)
• Abstract summary: Hexagon-MLIR is an open-source compilation stack that targets Qualcomm Hexagon Neural Processing Unit (NPU)<n>It provides unified support for lowering Triton kernels and PyTorch models.
• Score: 3.8043062351078585
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: In this paper, we present Hexagon-MLIR,an open-source compilation stack that targets Qualcomm Hexagon Neural Processing Unit (NPU) and provides unified support for lowering Triton kernels and PyTorch models . Built using the MLIR framework, our compiler applies a structured sequence of passes to exploit NPU architectural features to accelerate AI workloads. It enables faster deployment of new Triton kernels (hand-written or subgraphs from PyTorch 2.0), for our target by providing automated compilation from kernel to binary. By ingesting Triton kernels, we generate mega-kernels that maximize data locality in the NPU's Tightly Coupled Memory (TCM), reducing the bandwidth bottlenecks inherent in library-based approaches. This initiative complements our commercial toolchains by providing developers with an open-source MLIR-based compilation stack that gives them a path to advance AI compilation capabilities through a more flexible approach. Hexagon-MLIR is a work-in-progress, and we are continuing to add many more optimizations and capabilities in this effort.

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