Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense

• URL: http://arxiv.org/abs/2605.17358v1
• Date: Sun, 17 May 2026 09:54:02 GMT
• Title: Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense
• Abstract summary: JEDEC introduced Per Row Activation Counting with the Alert Back-Off protocol as an optional DDR5 feature.<n> PRAC requires per-row counter cells that incur area overhead, and updating them on every activation lengthens DRAM timing parameters.<n>We propose PrISM, an intersection-based probabilistic mitigation that correlates sampled rows across windows.
• Score: 12.03490786085903
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: DRAM scaling has exacerbated the RowHammer vulnerability. To counter this, JEDEC recently introduced Per Row Activation Counting (PRAC) with the Alert Back-Off protocol as an optional DDR5 feature. While promising, PRAC requires per-row counter cells that incur area overhead, and updating them on every activation lengthens DRAM timing parameters, degrading performance. Probabilistic mitigations such as MINT offer a lower-cost alternative by randomly selecting and mitigating rows within periodic mitigation windows. MINT is effective at higher thresholds (>= 1000), but at lower thresholds, it must raise its mitigation rate to overcome the non-selection problem, where heavily hammered rows can repeatedly escape sampling. This fixed-rate scaling reduces effective memory bandwidth even when no attack is present. To overcome this limitation, we propose PrISM, an intersection-based probabilistic mitigation that correlates sampled rows across windows using a Sampled History Queue (SHQ). PrISM samples a few activation slots per window, stores sampled-but-unmitigated rows in the SHQ, and requests an additional mitigation through the existing Alert Back-Off protocol when a sampled row reappears in this history. This allows PrISM to increase mitigation only when persistent row activity is observed, without globally increasing the fixed mitigation rate. At the threshold of 500, PrISM incurs a negligible 0.2% average slowdown compared to 14% for PRAC, with no DRAM array changes or per-row counters and only 625B of SRAM per bank, one to two orders of magnitude less than prior secure counter-based in-DRAM defenses. Compared to MINT, PrISM provides better scalability at low thresholds, reducing average slowdown from 10.7% to 1.5% at a threshold of 250, a 7.1x reduction. PrISM is open-sourced at https://github.com/STAR-Laboratory/prism.

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