ReRAM-aware Model Finetuning addressing I-V Non-linearity and Retention Errors

• URL: http://arxiv.org/abs/2606.17471v1
• Date: Tue, 16 Jun 2026 03:29:51 GMT
• Title: ReRAM-aware Model Finetuning addressing I-V Non-linearity and Retention Errors
• Abstract summary: In-Memory Computing (IMC) using ReRAM arrays offers a high-density, energy-efficient alternative.<n>Existing hardware-aware training frameworks often require training from scratch, which is computationally prohibitive for modern large-scale models.<n>We propose a finetuning-based hardware-aware training algorithm that enables robust deployment on ReRAM with minimal training overhead.
• Score: 2.8907262844892134
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Traditional CPU, GPU, and NPU architectures are increasingly limited by the von Neumann bottleneck. While In-Memory Computing (IMC) using ReRAM crossbar arrays offers a high-density, energy-efficient alternative, its practical deployment is constrained through their non-idealities. Existing hardware-aware training frameworks often require training from scratch, which is computationally prohibitive for modern large-scale models. In this work, we propose a finetuning-based hardware-aware training algorithm that enables robust DNN deployment on ReRAM with minimal training overhead. Our approach mitigates I-V non-linearity by applying a range-shrunk sinh transformation and incorporates retention errors directly into a regularization loss during the finetuning process. We evaluate our framework across models and tasks such as image classification and question-answering (QA). Experimental results demonstrate that our method achieves similar accuracy on large-scale models like ResNet18 and DeiT-Tiny as the base model. In-case of ImageNet for MobileNetV3 families the technique has only less than 2% accuracy degradation. Further, applying the technique on the SQuAD v2 dataset results in only 1 point degradation of F-1 score.

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