Layered Outer-Loop Control for Disturbance-Robust Multi-Waypoint UAV Arrival
- URL: http://arxiv.org/abs/2606.26315v1
- Date: Wed, 24 Jun 2026 18:58:57 GMT
- Title: Layered Outer-Loop Control for Disturbance-Robust Multi-Waypoint UAV Arrival
- Abstract summary: Disturbance-robust UAV position control is easy to demonstrate in benign simulations but hard to make fast in approach, well behaved near the target, and credible beyond a single benchmark.<n>This letter presents a layered terminal-control architecture for multi-waypoint UAV position control with a staged evaluation across PyBullet, PX4/Gazebo, and hardware.
- Score: 0.0
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Disturbance-robust UAV position control is easy to demonstrate in benign simulations but much harder to make fast in approach, well behaved near the target, and credible beyond a single benchmark. This letter presents a layered terminal-control architecture for multi-waypoint UAV position regulation together with a staged evaluation across PyBullet, PX4/Gazebo, and hardware. Phase I uses a PyBullet benchmark with stochastic wind for rapid structural selection, identifying a controller core that separates smooth approach generation, persistent-bias compensation, and supervised near-target terminal regulation. Phase II carries only that main architecture into a more demanding PX4/Gazebo closed loop, where the outer-loop controller acts through a cascaded flight stack with delay-sensitive settling and stronger transit-to-hover coupling. This step exposes which benchmark gains survive autopilot-mediated dynamics and which refinements collapse once the loop becomes more deployment-like. In Phase I, the bare controller attains 0.024 m mean late-stage wind error. In Phase II, the final controller is selected using a transfer-oriented rule emphasizing absence of benchmark priors, cross-scenario balance, and deployable supervisory logic. Strict is used as the primary reporting reference; the supplementary retrospective Grace analysis shows that part of the residual failure set is sensitive to completion semantics rather than gross waypoint-miss behaviour. The evaluation is completed on one Vicon-tracked Tello stack through a two-level hardware study. Taken together, the results suggest that benchmark success becomes more informative when the main controller design is separated from benchmark-specific refinement and remains defensible under harder closed-loop evaluation.
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