Automated Template-free Synthesis of Instruction-Centric Leakage Contracts for Black-Box CPUs

• URL: http://arxiv.org/abs/2607.15118v1
• Date: Thu, 16 Jul 2026 15:27:21 GMT
• Title: Automated Template-free Synthesis of Instruction-Centric Leakage Contracts for Black-Box CPUs
• Abstract summary: Side-channel attacks pose a significant security threat for modern computing platforms.<n>Recent work proposed leakage contracts: an ISA-level security abstraction that provides the foundations for secure CPU programming.<n>We present a methodology to extract instruction-centric leakage contracts for major CPU architectures with minimal manual intervention.
• Score: 8.862143484904811
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Side-channel attacks pose a significant security threat for modern computing platforms, because they exploit subtle discrepancies in CPU behaviors to leak sensitive information. To model the information leaked by a CPU via microarchitectural side-channels, recent work proposed leakage contracts: an ISA-level security abstraction that provides the foundations for secure CPU programming. Unfortunately, due to the complexity of current microarchitectures, devising a leakage contract for a CPU requires extensive manual effort and thus modern CPUs lack dedicated leakage contracts. We present a methodology to extract instruction-centric leakage contracts for major CPU architectures with minimal manual intervention. We implemented this technique in malcos, the first template-free tool that automates the synthesis of leakage contracts for black-box CPUs. We evaluate malcos on x86 and ARM CPUs, and show that the contracts it synthesizes are precise and sound with respect to all leaks observed during synthesis. Our results demonstrate that learning leakage contracts from black-box CPUs is feasible.

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