A Time-Based Readout for Vector-Matrix Multiplication in Fully Analog Memristive SNNs

• URL: http://arxiv.org/abs/2609.11713v1
• Date: Thu, 10 Sep 2026 15:30:34 GMT
• Title: A Time-Based Readout for Vector-Matrix Multiplication in Fully Analog Memristive SNNs
• Abstract summary: This work proposes a fully analog readout architecture based on voltage-to-time conversion of the VMM output.<n>By sensing the column voltage, the proposed approach avoids current-mode summing and scaling circuitry, improving area and energy efficiency.
• Score: 0.12314765641075437
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Artificial neural networks rely on vector-matrix multiplications (VMMs), whose implementation in von Neumann architectures is dominated by costly data movement between memory and processing units. Spiking neural networks (SNNs) mitigate this bottleneck by performing in-memory, analog VMMs using memristive crossbar arrays. However, conventional current-mode readout circuits incur significant area and power overhead. This work proposes a fully analog readout architecture based on voltage-to-time conversion of the VMM output. By sensing the column voltage, the proposed approach avoids current-mode summing and scaling circuitry, improving area and energy efficiency. Post-layout simulations of a 10x1 SNN implemented in a 130 nm CMOS technology validate the proposed architecture, while application to a trained 64x10 SNN for digit classification further demonstrates its feasibility for SNN inference.

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