Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs

• URL: http://arxiv.org/abs/2005.01574v1
• Date: Wed, 29 Apr 2020 17:52:53 GMT
• Title: Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs
• Abstract summary: We develop a specification mining approach that automatically extracts sequential patterns from transaction-level traces. The proposed approach is capable of extracting various patterns on system-level specifications from the highly concurrent execution traces.
• Score: 6.050748152029478
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Comprehensive specifications are essential for various activities across the entire validation continuum for system-on-chip (SoC) designs. However, specifications are often ambiguous, incomplete, or even contain inconsistencies or errors. This paper addresses this problem by developing a specification mining approach that automatically extracts sequential patterns from SoC transaction-level traces such that the mined patterns collectively characterize system-level specifications for SoC designs. This approach exploits long short-term memory (LSTM) networks trained with the collected SoC execution traces to capture sequential dependencies among various communication events. Then, a novel algorithm is developed to efficiently extract sequential patterns on system-level communications from the trained LSTM models. Several trace processing techniques are also proposed to enhance the mining performance. We evaluate the proposed approach on simulation traces of a non-trivial multi-core SoC prototype. Initial results show that the proposed approach is capable of extracting various patterns on system-level specifications from the highly concurrent SoC execution traces.

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