Thermal vulnerability detection in integrated electronic and photonic
circuits using IR thermography
- URL: http://arxiv.org/abs/2006.12201v1
- Date: Fri, 1 May 2020 09:25:55 GMT
- Title: Thermal vulnerability detection in integrated electronic and photonic
circuits using IR thermography
- Authors: Bilal Hussain, Bushra Jalil, Maria Antonietta Pascali, Muhammad Imran,
Giovanni Serafino, Davide Moroni and Paolo Ghelfi
- Abstract summary: This work presents an IR-assisted thermal vulnerability detection technique suitable for photonic as well as electronic components.
For the first time, the reliability testing is extended to a fully functional microwave photonic system using conventional IR thermography.
- Score: 1.8809094132625916
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Failure prediction of any electrical/optical component is crucial for
estimating its operating life. Using high temperature operating life (HTOL)
tests, it is possible to model the failure mechanisms for integrated circuits.
Conventional HTOL standards are not suitable for operating life prediction of
photonic components owing to their functional dependence on thermo-optic
effect. This work presents an IR-assisted thermal vulnerability detection
technique suitable for photonic as well as electronic components. By accurately
mapping the thermal profile of an integrated circuit under a stress condition,
it is possible to precisely locate the heat center for predicting the long-term
operational failures within the device under test. For the first time, the
reliability testing is extended to a fully functional microwave photonic system
using conventional IR thermography. By applying image fusion using affine
transformation on multimodal acquisition, it was demonstrated that by comparing
the IR profile and GDSII layout, it is possible to accurately locate the heat
centers along with spatial information on the type of component. Multiple IR
profiles of optical as well as electrical components/circuits were acquired and
mapped onto the layout files. In order to ascertain the degree of effectiveness
of the proposed technique, IR profiles of CMOS RF and digital circuits were
also analyzed. The presented technique offers a reliable automated
identification of heat spots within a circuit/system.
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