Fast convolutional neural networks on FPGAs with hls4ml

• URL: http://arxiv.org/abs/2101.05108v1
• Date: Wed, 13 Jan 2021 14:47:11 GMT
• Title: Fast convolutional neural networks on FPGAs with hls4ml
• Authors: Thea Aarrestad, Vladimir Loncar, Maurizio Pierini, Sioni Summers, Jennifer Ngadiuba, Christoffer Petersson, Hampus Linander, Yutaro Iiyama, Giuseppe Di Guglielmo, Javier Duarte, Philip Harris, Dylan Rankin, Sergo Jindariani, Kevin Pedro, Nhan Tran, Mia Liu, Edward Kreinar, Zhenbin Wu, and Duc Hoang
• Abstract summary: We introduce an automated tool for deploying ultra low-latency, low-power deep neural networks on FPGAs. We demonstrate how to achieve inference latency of $5,mu$s using convolutional architectures, while preserving state-of-the-art model performance.
• Score: 0.22756183402372013
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: We introduce an automated tool for deploying ultra low-latency, low-power deep neural networks with large convolutional layers on FPGAs. By extending the hls4ml library, we demonstrate how to achieve inference latency of $5\,\mu$s using convolutional architectures, while preserving state-of-the-art model performance. Considering benchmark models trained on the Street View House Numbers Dataset, we demonstrate various methods for model compression in order to fit the computational constraints of a typical FPGA device. In particular, we discuss pruning and quantization-aware training, and demonstrate how resource utilization can be reduced by over 90% while maintaining the original model accuracy.

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