Scalable quantum random number generator for cryptography based on the random flip-flop approach

• URL: http://arxiv.org/abs/2102.12204v1
• Date: Wed, 24 Feb 2021 11:00:22 GMT
• Title: Scalable quantum random number generator for cryptography based on the random flip-flop approach
• Authors: Mario Stip\v{c}evi\'c, Ivan Michel Antolovi\'c, Claudio Bruschini, Edoardo Charbon
• Abstract summary: We present a quantum random number generator (QRNG) which makes use of a photoelectric effect in single-photon avalanche diodes (SPADs) as a source of randomness. For the first time we investigate this method in detail and find that, out of two main imperfections, bias is due only to hardware imperfections.
• Score: 1.2578844450585998
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: For globally connected devices like smart phones, personal computers and Internet-of-things devices, the ability to generate random numbers is essential for execution of cryptographic protocols responsible for information security. Generally, a random number generator should be small, robust, utilize as few hardware and energy resources as possible, yet provide excellent randomness at a high enough speed (bitrate) for a given purpose. In this work we present a quantum random number generator (QRNG) which makes use of a photoelectric effect in single-photon avalanche diodes (SPADs) as a source of randomness and is scalable to any desired bitrate. We use the random flip-flop method in which random bits are obtained by periodic sampling of a randomly toggling flip-flop. For the first time we investigate this method in detail and find that, out of two main imperfections, bias is due only to hardware imperfections while autocorrelation predominantly resides with the method itself. SPADs are integrated on a silicon chip together with passive quenching and digital pulse-shaping circuitry, using a standard 180 nm CMOS process. A separate FPGA chip derives random numbers from the detection signals. The basic QRNG cell, made of only two SPADs and a few logic circuits, can generate up to 20 Mbit/s that pass NIST statistical tests without any further postprocessing. This technology allows integration of a QRNG on a single silicon chip using readily available industrial processes.

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