An Embedded Iris Recognition System Optimization using Dynamically
ReconfigurableDecoder with LDPC Codes
- URL: http://arxiv.org/abs/2107.03688v1
- Date: Thu, 8 Jul 2021 09:04:11 GMT
- Title: An Embedded Iris Recognition System Optimization using Dynamically
ReconfigurableDecoder with LDPC Codes
- Authors: Longyu Ma, Chiu-Wing Sham, Chun Yan Lo, and Xinchao Zhong
- Abstract summary: The proposed design includes a minimal set of computer vision modules and multi-mode QC-LDPC decoder.
We show that we can apply Dynamic Partial Reconfiguration technology to implement the multi-mode QC-LDPC decoder for the iris recognition system.
- Score: 0.0
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: Extracting and analyzing iris textures for biometric recognition has been
extensively studied. As the transition of iris recognition from lab technology
to nation-scale applications, most systems are facing high complexity in either
time or space, leading to unfitness for embedded devices. In this paper, the
proposed design includes a minimal set of computer vision modules and
multi-mode QC-LDPC decoder which can alleviate variability and noise caused by
iris acquisition and follow-up process. Several classes of QC-LDPC code from
IEEE 802.16 are tested for the validity of accuracy improvement. Some of the
codes mentioned above are used for further QC-LDPC decoder quantization,
validation and comparison to each other. We show that we can apply Dynamic
Partial Reconfiguration technology to implement the multi-mode QC-LDPC decoder
for the iris recognition system. The results show that the implementation is
power-efficient and good for edge applications.
Related papers
- Accelerating Error Correction Code Transformers [56.75773430667148]
We introduce a novel acceleration method for transformer-based decoders.
We achieve a 90% compression ratio and reduce arithmetic operation energy consumption by at least 224 times on modern hardware.
arXiv Detail & Related papers (2024-10-08T11:07:55Z) - Energy-Efficient & Real-Time Computer Vision with Intelligent Skipping via Reconfigurable CMOS Image Sensors [5.824962833043625]
Video-based computer vision applications typically suffer from high energy consumption due to reading and processing all pixels in a frame, regardless of their significance.
Previous works have attempted to reduce this energy by skipping input patches or pixels and using feedback from the end task to guide the skipping algorithm.
This paper presents a custom-designed CMOS image sensor (CIS) system that improves energy efficiency by selectively skipping uneventful regions or rows within a frame during the sensor's readout phase.
arXiv Detail & Related papers (2024-09-25T20:32:55Z) - Performance of Cascade and LDPC-codes for Information Reconciliation on Industrial Quantum Key Distribution Systems [69.47813697920358]
We analyze, simulate, optimize, and compare the performance of two prevalent algorithms used for Information Reconciliation.
We focus on their applicability in practical and industrial settings, operating in realistic and application-close conditions.
arXiv Detail & Related papers (2024-08-28T12:51:03Z) - Decoding Quantum LDPC Codes Using Graph Neural Networks [52.19575718707659]
We propose a novel decoding method for Quantum Low-Density Parity-Check (QLDPC) codes based on Graph Neural Networks (GNNs)
The proposed GNN-based QLDPC decoder exploits the sparse graph structure of QLDPC codes and can be implemented as a message-passing decoding algorithm.
arXiv Detail & Related papers (2024-08-09T16:47:49Z) - AdaLog: Post-Training Quantization for Vision Transformers with Adaptive Logarithm Quantizer [54.713778961605115]
Vision Transformer (ViT) has become one of the most prevailing fundamental backbone networks in the computer vision community.
We propose a novel non-uniform quantizer, dubbed the Adaptive Logarithm AdaLog (AdaLog) quantizer.
arXiv Detail & Related papers (2024-07-17T18:38:48Z) - Check-Agnosia based Post-Processor for Message-Passing Decoding of Quantum LDPC Codes [3.4602940992970908]
We introduce a new post-processing algorithm with a hardware-friendly orientation, providing error correction performance competitive to the state-of-the-art techniques.
We show that latency values close to one microsecond can be obtained on the FPGA board, and provide evidence that much lower latency values can be obtained for ASIC implementations.
arXiv Detail & Related papers (2023-10-23T14:51:22Z) - Neural Belief Propagation Decoding of Quantum LDPC Codes Using
Overcomplete Check Matrices [60.02503434201552]
We propose to decode QLDPC codes based on a check matrix with redundant rows, generated from linear combinations of the rows in the original check matrix.
This approach yields a significant improvement in decoding performance with the additional advantage of very low decoding latency.
arXiv Detail & Related papers (2022-12-20T13:41:27Z) - Towards an efficient Iris Recognition System on Embedded Devices [10.096614253237103]
This work aims to develop and implement iris recognition software in an embedding system and calibrate NIR in a contactless binocular setup.
We evaluate and contrast speed versus performance obtained with two embedded computers and infrared cameras.
A lightweight segmenter sub-system called "Unet_xxs" is proposed, which can be used for iris semantic segmentation under restricted memory resources.
arXiv Detail & Related papers (2022-10-24T10:37:40Z) - Task-Oriented Sensing, Computation, and Communication Integration for
Multi-Device Edge AI [108.08079323459822]
This paper studies a new multi-intelligent edge artificial-latency (AI) system, which jointly exploits the AI model split inference and integrated sensing and communication (ISAC)
We measure the inference accuracy by adopting an approximate but tractable metric, namely discriminant gain.
arXiv Detail & Related papers (2022-07-03T06:57:07Z) - Trapping Sets of Quantum LDPC Codes [9.482750811734565]
We identify and classify quantum trapping sets (QTSs) according to their topological structure and decoder used.
We show that the knowledge of QTSs can be used to design better QLDPC codes and decoders.
arXiv Detail & Related papers (2020-12-30T19:35:17Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.