An Efficient Multicast Addressing Encoding Scheme for Multi-Core Neuromorphic Processors
- URL: http://arxiv.org/abs/2411.11545v1
- Date: Mon, 18 Nov 2024 13:04:38 GMT
- Title: An Efficient Multicast Addressing Encoding Scheme for Multi-Core Neuromorphic Processors
- Authors: Zhe Su, Aron Bencsik, Giacomo Indiveri, Davide Bertozzi,
- Abstract summary: Multi-core neuromorphic processors are becoming increasingly significant due to their energy-efficient local computing and scalable modular architecture.
We propose a hierarchical bit string encoding scheme that expands the addressing capability of state-of-the-art symbol-based schemes for the same number of routing bits.
When put at work with a real neuromorphic task, this hierarchical bit string encoding achieves a reduction in area cost by approximately 29% and decreases energy consumption by about 50%.
- Score: 4.251655740279756
- License:
- Abstract: Multi-core neuromorphic processors are becoming increasingly significant due to their energy-efficient local computing and scalable modular architecture, particularly for event-based processing applications. However, minimizing the cost of inter-core communication, which accounts for the majority of energy usage, remains a challenging issue. Beyond optimizing circuit design at lower abstraction levels, an efficient multicast addressing scheme is crucial. We propose a hierarchical bit string encoding scheme that largely expands the addressing capability of state-of-the-art symbol-based schemes for the same number of routing bits. When put at work with a real neuromorphic task, this hierarchical bit string encoding achieves a reduction in area cost by approximately 29% and decreases energy consumption by about 50%.
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