T-Edge: Trusted Heterogeneous Edge Computing

• URL: http://arxiv.org/abs/2412.13905v1
• Date: Wed, 18 Dec 2024 14:45:07 GMT
• Title: T-Edge: Trusted Heterogeneous Edge Computing
• Authors: Jiamin Shen, Yao Chen, Weng-Fai Wong, Ee-Chien Chang,
• Abstract summary: This paper proposes a practical trusted execution environment design for ARM/FPGA System-on-Chip platforms. The design features a dedicated security controller within the ARM TrustZone, overseeing FPGA reconfiguration and managing communication between CPU cores and FPGA fabrics. We employ an automated protocol verifier, ProVerif, to validate its compliance with essential security requirements.
• Score: 11.859343440194944
• License:
• Abstract: Heterogeneous computing, which incorporates GPUs, NPUs, and FPGAs, is increasingly utilized to improve the efficiency of computer systems. However, this shift has given rise to significant security and privacy concerns, especially when the execution platform is remote. One way to tackle these challenges is to establish a trusted and isolated environment for remote program execution, while maintaining minimal overhead and flexibility. While CPU-based trusted execution has been extensively explored and found commercial success, extension to heterogeneous computing systems remains a challenge. This paper proposes a practical trusted execution environment design for ARM/FPGA System-on-Chip platforms, leveraging TrustZone's unique characteristics. The design features a dedicated security controller within the ARM TrustZone, overseeing FPGA reconfiguration and managing communication between CPU cores and FPGA fabrics. This design involves a provisioning service that enables application users to establish trust in the FPGA fabric within cloud-based computing resources provided by the platform owner, running applications developed by third-party developers and hardware manufactured by the device manufacturer. To ensure the security of our proposed system, we employ an automated protocol verifier, ProVerif, to validate its compliance with essential security requirements. Furthermore, we demonstrate the practicality of our system model by implementing a prototype application on the Xilinx MPSoC development board.

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