EDA-Q: Electronic Design Automation for Superconducting Quantum Chip

• URL: http://arxiv.org/abs/2502.15386v5
• Date: Thu, 17 Apr 2025 08:43:49 GMT
• Title: EDA-Q: Electronic Design Automation for Superconducting Quantum Chip
• Authors: Bo Zhao, Zhihang Li, Xiaohan Yu, Benzheng Yuan, Chaojie Zhang, Yimin Gao, Weilong Wang, Qing Mu, Shuya Wang, Huihui Sun, Tian Yang, Mengfan Zhang, Chuanbing Han, Peng Xu, Wenqing Wang, Zheng Shan,
• Abstract summary: We develop a full-stack EDA tool specifically for quantum chip design, called EDA-Q.<n>EDA-Q incorporates functionalities present in existing quantum EDA tools while supplementing critical design stages such as device mapping and fabrication process mapping.<n>The integrated design mode guarantees algorithm compatibility with different chip components, while employing a specialized interactive processing mode to offer users a straightforward and adaptable command interface.
• Score: 14.290636426812265
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Electronic Design Automation (EDA) plays a crucial role in classical chip design and significantly influences the development of quantum chip design. However, traditional EDA tools cannot be directly applied to quantum chip design due to vast differences compared to the classical realm. Several EDA products tailored for quantum chip design currently exist, yet they only cover partial stages of the quantum chip design process instead of offering a fully comprehensive solution. Additionally, they often encounter issues such as limited automation, steep learning curves, challenges in integrating with actual fabrication processes, and difficulties in expanding functionality. To address these issues, we developed a full-stack EDA tool specifically for quantum chip design, called EDA-Q. The design workflow incorporates functionalities present in existing quantum EDA tools while supplementing critical design stages such as device mapping and fabrication process mapping, which users expect. EDA-Q utilizes a unique architecture to achieve exceptional scalability and flexibility. The integrated design mode guarantees algorithm compatibility with different chip components, while employing a specialized interactive processing mode to offer users a straightforward and adaptable command interface. Application examples demonstrate that EDA-Q significantly reduces chip design cycles, enhances automation levels, and decreases the time required for manual intervention. Multiple rounds of testing on the designed chip have validated the effectiveness of EDA-Q in practical applications.

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