AI Accelerators for Large Language Model In-ference: Architecture Analysis and Scaling Strategies

• URL: http://arxiv.org/abs/2506.00008v1
• Date: Tue, 13 May 2025 20:21:20 GMT
• Title: AI Accelerators for Large Language Model In-ference: Architecture Analysis and Scaling Strategies
• Authors: Amit Sharma,
• Abstract summary: Large-language models (LLMs) are driving a new wave of specialized hardware for inference.<n>This paper presents the first workload-centric, cross-architectural performance study of commercial AI accelerators.
• Score: 10.520360508397237
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: The rapid growth of large-language models (LLMs) is driving a new wave of specialized hardware for inference. This paper presents the first workload-centric, cross-architectural performance study of commercial AI accelerators, spanning GPU-based chips, hybrid packages, and wafer-scale engines. We compare memory hierarchies, compute fabrics, and on-chip interconnects, and observe up to 3.7x performance variation across architectures as batch size and sequence length change. Four scaling techniques for trillion-parameter models are examined; expert parallelism offers an 8.4x parameter-to-compute advantage but incurs 2.1x higher latency variance than tensor parallelism. These findings provide quantitative guidance for matching workloads to accelerators and reveal architectural gaps that next-generation designs must address.

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