Quantum Computing in Discrete- and Continuous-Variable Architectures

• URL: http://arxiv.org/abs/2507.01146v1
• Date: Tue, 01 Jul 2025 19:11:49 GMT
• Title: Quantum Computing in Discrete- and Continuous-Variable Architectures
• Authors: Shraddha Singh,
• Abstract summary: This thesis develops a theoretical framework for hybrid continuous-variable (CV) and discrete-variable (DV) quantum systems.<n>A central contribution is non-abelian quantum signal processing (NA-QSP), a generalization of quantum signal processing to settings where control parameters are non-commuting operators.<n>Within this framework, we introduce the Gaussian-Controlled-Rotation (GCR) protocol, which enables high-fidelity control of CV states using DV ancillae.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: This thesis develops a theoretical framework for hybrid continuous-variable (CV) and discrete-variable (DV) quantum systems, with emphasis on quantum control, state preparation, and error correction. A central contribution is non-abelian quantum signal processing (NA-QSP), a generalization of quantum signal processing to settings where control parameters are non-commuting operators. Within this framework, we introduce the Gaussian-Controlled-Rotation (GCR) protocol, which enables high-fidelity control of CV states using DV ancillae. This approach allows for deterministic preparation of squeezed, cat, and Gottesman-Kitaev-Preskill (GKP) states without numerical optimization. Two previously unpublished contributions are included: (i) Chapter 2.3 introduces the Gaussian hierarchy, a classification of CV operations analogous to the Clifford hierarchy, offering a new lens for understanding CV gate sets; (ii) Chapter 5 presents an analytical framework for correcting photon loss in finite-energy GKP codes, introducing the notion of probabilistic error correction, providing insight into recent GKP experiments surpassing break-even thresholds. Overall, this work lays the groundwork for scalable, fault-tolerant quantum computation in hybrid CV-DV architectures, with applications to logical gate synthesis, readout, and hybrid algorithm design using ancilla oscillators.

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