Recurrent Deep Differentiable Logic Gate Networks

• URL: http://arxiv.org/abs/2508.06097v1
• Date: Fri, 08 Aug 2025 07:49:38 GMT
• Title: Recurrent Deep Differentiable Logic Gate Networks
• Authors: Simon Bührer, Andreas Plesner, Till Aczel, Roger Wattenhofer,
• Abstract summary: This paper presents the first implementation of Recurrent Deep Differentiable Logic Gate Networks (RDDLGN)<n>It achieves 5.00 BLEU and 30.9% accuracy during training, approaching GRU performance (5.41 BLEU) and graceful degradation degradation (4.39 BLEU) during inference.<n>This work establishes recurrent logic-based neural computation as viable, opening research directions for FPGA acceleration in sequential modeling.
• Score: 18.95453617434051
• License: http://creativecommons.org/licenses/by-sa/4.0/
• Abstract: While differentiable logic gates have shown promise in feedforward networks, their application to sequential modeling remains unexplored. This paper presents the first implementation of Recurrent Deep Differentiable Logic Gate Networks (RDDLGN), combining Boolean operations with recurrent architectures for sequence-to-sequence learning. Evaluated on WMT'14 English-German translation, RDDLGN achieves 5.00 BLEU and 30.9\% accuracy during training, approaching GRU performance (5.41 BLEU) and graceful degradation (4.39 BLEU) during inference. This work establishes recurrent logic-based neural computation as viable, opening research directions for FPGA acceleration in sequential modeling and other recursive network architectures.

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