A2HCoder: An LLM-Driven Coding Agent for Hierarchical Algorithm-to-HDL Translation
- URL: http://arxiv.org/abs/2508.10904v2
- Date: Mon, 25 Aug 2025 06:20:15 GMT
- Title: A2HCoder: An LLM-Driven Coding Agent for Hierarchical Algorithm-to-HDL Translation
- Authors: Jie Lei, Ruofan Jia, J. Andrew Zhang, Hao Zhang,
- Abstract summary: We propose A2HCoder: a Hierarchical algorithm-to-HDL Coding Agent, powered by large language models (LLMs)<n>A2HCoder decomposes complex algorithms into modular functional blocks, simplifying code generation and improving consistency.<n>We validate A2HCoder through a real-world deployment case in the 5G wireless communication domain.
- Score: 22.500705069833373
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: In wireless communication systems, stringent requirements such as ultra-low latency and power consumption have significantly increased the demand for efficient algorithm-to-hardware deployment. However, a persistent and substantial gap remains between algorithm design and hardware implementation. Bridging this gap traditionally requires extensive domain expertise and time-consuming manual development, due to fundamental mismatches between high-level programming languages like MATLAB and hardware description languages (HDLs) such as Verilog-in terms of memory access patterns, data processing manners, and datatype representations. To address this challenge, we propose A2HCoder: a Hierarchical Algorithm-to-HDL Coding Agent, powered by large language models (LLMs), designed to enable agile and reliable algorithm-to-hardware translation. A2HCoder introduces a hierarchical framework that enhances both robustness and interpretability while suppressing common hallucination issues in LLM-generated code. In the horizontal dimension, A2HCoder decomposes complex algorithms into modular functional blocks, simplifying code generation and improving consistency. In the vertical dimension, instead of relying on end-to-end generation, A2HCoder performs step-by-step, fine-grained translation, leveraging external toolchains such as MATLAB and Vitis HLS for debugging and circuit-level synthesis. This structured process significantly mitigates hallucinations and ensures hardware-level correctness. We validate A2HCoder through a real-world deployment case in the 5G wireless communication domain, demonstrating its practicality, reliability, and deployment efficiency.
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