3D Stacked Surface-Code Architecture for Measurement-Free Fault-Tolerant Quantum Error Correction

• URL: http://arxiv.org/abs/2601.13648v1
• Date: Tue, 20 Jan 2026 06:32:28 GMT
• Title: 3D Stacked Surface-Code Architecture for Measurement-Free Fault-Tolerant Quantum Error Correction
• Authors: GunSik Min, IlKwon Sohn, Jun Heo,
• Abstract summary: Mid-circuit measurements are a major bottleneck for superconducting quantum processors because they are slower and noisier than gates.<n>Measurement-free quantum error correction (mfec) replaces repeated measurements and classical feed-forward by coherent quantum feedback.<n>Existing mfec protocols suffer from severe connectivity overhead when mapped to planar surface-code architectures.<n>This work introduces a 3D stacked surface-code architecture for measurement-free fault-tolerant quantum error correction.
• Score: 0.15293427903448018
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Mid-circuit measurements are a major bottleneck for superconducting quantum processors because they are slower and noisier than gates. Measurement-free quantum error correction (mfec) replaces repeated measurements and classical feed-forward by coherent quantum feedback, but existing mfec protocols suffer from severe connectivity overhead when mapped to planar surface-code architectures: transversal interactions between logical patches require SWAP chains of length $O(d)$ in the code distance, which increase depth and generate hook errors. This work introduces a 3D stacked surface-code architecture for measurement-free fault-tolerant quantum error correction that removes this connectivity bottleneck. Vertical transversal couplers between aligned surface-code patches enable coherent parity mapping and feedback with zero SWAP overhead, realizing constant-depth $O(1)$ inter-layer operations in d while preserving local 2D stabilizer checks. A fault-tolerant mfec protocol for the surface code is constructed that suppresses hook errors under realistic noise. An analytical performance model shows that the 3D architecture overcomes the readout error floor and achieves logical error rates orders of magnitude below both standard measurement-based surface codes and 2D mfec variants in regimes with slow, noisy measurements, identifying 3D integration as a key enabler for scalable measurement-free fault tolerance.

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