High-yield integration design of fixed-frequency superconducting qubit systems using siZZle-CZ gates

• URL: http://arxiv.org/abs/2603.21537v2
• Date: Tue, 24 Mar 2026 03:21:09 GMT
• Title: High-yield integration design of fixed-frequency superconducting qubit systems using siZZle-CZ gates
• Abstract summary: Fixed-frequency transmon qubits are promising platforms for large-scale quantum computing.<n>We show that siZZle-CZ gate is a scalable and collision-robust alternative to the cross-resonance (CR) gate.
• Score: 0.09176056742068811
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Fixed-frequency transmon qubits, characterized by simple architectures and long coherence times, are promising platforms for large-scale quantum computing. However, the rapidly increasing frequency collisions, which directly reduce the fabrication yield, hinder scaling, especially in cross-resonance (CR) gate-based architectures, wherein the restricted drive frequency severely limits the available design space. We investigate the Stark-induced ZZ by level excursions (siZZle) gate, which relaxes this limitation by allowing arbitrary drive-frequency choices. Extensive numerical analyses across a broad parameter range -- including the far-detuned regime that has received negligible prior attention -- reveal wide operating windows that support controlled-Z (CZ) fidelities >99.6%. Leveraging these windows, we design lattice architectures containing >1000 qubits, showing that even under 0.25% fabrication-induced frequency dispersion, the zero-collision yields in square and heavy-hexagonal lattices reach 80% and 100%, respectively. Thus, the siZZle-CZ gate is a scalable and collision-robust alternative to the CR gate, offering a viable route toward high-yield fixed-frequency transmon quantum processors.

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