HyPulse: A Pulse Synthesis Framework for Hybrid Qubit-Oscillator Gates on Trapped-Ion Platform
- URL: http://arxiv.org/abs/2604.26804v1
- Date: Wed, 29 Apr 2026 15:34:29 GMT
- Title: HyPulse: A Pulse Synthesis Framework for Hybrid Qubit-Oscillator Gates on Trapped-Ion Platform
- Abstract summary: We present HyPulse, a hardware-aware pulse synthesis and generation framework.<n>An offline optimization engine populates a content-addressed cache of high-fidelity primitives.<n>An online assembler constructs circuit-specific pulse programs ready to drive trapped-ion hardware control systems.
- Score: 3.913293205812247
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: As hybrid qubit-oscillator algorithm development and trapped-ion hardware demonstrations advance in parallel, there is a lack of a compilation layer connecting the two at the pulse level in the vertical software stack. While qubit gate control and pulse synthesis are well-established, the translation of hybrid qubit-oscillator primitives to the pulse level has not been systematically addressed. This gap is further compounded by the inherently continuous parametric nature of such gates. Each distinct parameter value defines a physically unique operation requiring independent pulse optimization, making static pre-compilation strategies inapplicable. To fill this gap, we present HyPulse, a hardware-aware pulse synthesis and generation framework, which contributes a two-phase architecture decoupling pulse discovery from circuit assembly. An offline optimization engine populates a content-addressed cache of high-fidelity primitives: If a pulse for a given gate, parameter, and device specification already exists in the library, it is retrieved instantly; otherwise the optimizer synthesizes, hashes, and caches it automatically. An online assembler then constructs circuit-specific pulse programs ready to drive trapped-ion hardware control systems via DAX/ARTIQ (Duke) and JaqalPaw/QSCOUT (Sandia), trapped-ion pulse execution backends.
Related papers
- Time-optimal quantum gates with bang-bang control in multilevel systems [0.0]
We determine the optimal quantum manipulation protocols for implementing high-fidelity, fast single-qubit gates.<n>We show that the time-optimal pulse sequence is a bang-bang'' sequence of discrete pulses of either positive or negative maximum amplitude or zero.<n>Open-system simulations demonstrate that these sequences outperform commensurate and resonant pulse schemes across different fluxonium regimes.
arXiv Detail & Related papers (2026-08-17T15:20:52Z) - Synthesizing Compound Pulse Gadgets for Hamiltonian Simulation on Trapped-Ion Platforms [3.582197298957967]
Current compilers treat quantum operations as discrete units, forcing the physical control layer to execute highly fragmented laser pulses.<n>This work introduces a holistic pulse synthesis strategy that bypasses discrete gate-stitching to compile algorithms directly into continuous compound pulse gadgets.
arXiv Detail & Related papers (2026-07-01T11:48:18Z) - Uncovering Latent Structures in Robust Pulse Sequences: A Model-Based Reinforcement Learning Approach for Adaptable Quantum Control [0.0]
Real-time adaptive control of quantum systems requires rapid generation of robust, high-fidelity pulses.<n>We present an approach to robust optimal quantum control based on model-based reinforcement learning.
arXiv Detail & Related papers (2026-06-23T12:37:04Z) - Hardware-Efficient Hamiltonian Simulation via Trotter-Initialized Variational Optimization with Native Placement [0.0]
We introduce a structure-aware compilation framework that treats product-formula decompositions as synthesis primitives.<n>Across Heisenberg, Ising, and XY models with $n$--$8$ qubits, the compiled circuits achieve fidelities $F>0.996$.<n>On IBM Torino hardware, we observe a regime in which shorter approximate circuits outperform deeper exact decompositions.
arXiv Detail & Related papers (2026-04-29T13:26:54Z) - AdaFuse: Accelerating Dynamic Adapter Inference via Token-Level Pre-Gating and Fused Kernel Optimization [84.25316984309725]
Integration of dynamic, sparse structures with parameter-efficient adapters (e.g., LoRA) is a powerful technique for enhancing Large Language Models (LLMs)<n>Despite minimal increases in computational load, the computation latency often skyrockets, leading to decoding speeds slowing by over 2.5 times.<n>AdaFuse is a framework built on a tight co-design between the algorithm and the underlying hardware system to enable efficient dynamic adapter execution.
arXiv Detail & Related papers (2026-03-12T12:46:42Z) - Eliminating Multi-GPU Performance Taxes: A Systems Approach to Efficient Distributed LLMs [61.953548065938385]
We introduce the ''Three Taxes'' (Bulk Synchronous, Inter- Kernel Data Locality, and Kernel Launch Overhead) as an analytical framework.<n>We propose moving beyond the rigid BSP model to address key inefficiencies in distributed GPU execution.<n>We observe a 10-20% speedup in end-to-end latency over BSP-based approaches.
arXiv Detail & Related papers (2025-11-04T01:15:44Z) - Oscillator-qubit generalized quantum signal processing for vibronic models: a case study of uracil cation [4.351505522514463]
We present a compiler for hybrid oscillator-qubit processors, implementing state preparation and time evolution.<n>This compiler invokes generalized quantum signal processing (GQSP) to synthesize arbitrary bosonic phase gates.<n>We validate our method on the uracil cation, a canonical system whose accurate modeling requires anharmonic vibronic models.
arXiv Detail & Related papers (2025-10-12T08:13:57Z) - CLASS: A Controller-Centric Layout Synthesizer for Dynamic Quantum Circuits [58.16162138294308]
CLASS is a controller-centric layout synthesizer designed to reduce inter-controller communication latency in a distributed control system.<n> Evaluations demonstrate that CLASS effectively reduces communication latency by up to 100% with only a 2.10% average increase in the number of additional operations.
arXiv Detail & Related papers (2025-09-19T08:11:55Z) - Neural-network-based design and implementation of fast and robust quantum gates [0.0]
We present a continuous-time, neural-network-based approach to optimal control in quantum systems, with a focus on pulse engineering for quantum gates.<n>We construct control fields as outputs of trainable neural networks, thereby eliminating the need for discrete parametrization or predefined bases.
arXiv Detail & Related papers (2025-05-04T10:12:27Z) - Graph-Based Pulse Representation for Diverse Quantum Control Hardware [0.3999851878220878]
pulselib is a graph-based pulse-level representation for quantum systems.
We describe the architecture of this proposed representation that mimics the abstract syntax tree (AST) model from classical compilation pipelines.
We outline applications like trapped-ion-specific gate and shelving pulse schemes whose constraints and implementation can be written and represented due to pulselib's graph-based architecture.
arXiv Detail & Related papers (2024-09-12T21:39:14Z) - EPOC: A Novel Pulse Generation Framework Incorporating Advanced Synthesis Techniques for Quantum Circuits [5.42802616500974]
EPOC is an efficient pulse generation framework for quantum circuits.
It combines ZX-Calculus, circuit partitioning, and circuit synthesis to accelerate pulse generation.
arXiv Detail & Related papers (2024-05-06T19:20:32Z) - Pulse-controlled qubit in semiconductor double quantum dots [57.916342809977785]
We present a numerically-optimized multipulse framework for the quantum control of a single-electron charge qubit.
A novel control scheme manipulates the qubit adiabatically, while also retaining high speed and ability to perform a general single-qubit rotation.
arXiv Detail & Related papers (2023-03-08T19:00:02Z) - Extending XACC for Quantum Optimal Control [70.19683407682642]
Quantum computing vendors are beginning to open up application programming for direct pulse-level quantum control.
We present an extension to the XACC system-level quantum-classical software framework.
This extension enables the translation of digital quantum circuit representations to equivalent pulse sequences.
arXiv Detail & Related papers (2020-06-04T13:13:55Z) - Enabling Pulse-level Programming, Compilation, and Execution in XACC [78.8942067357231]
Gate-model quantum processing units (QPUs) are currently available from vendors over the cloud.
Digital quantum programming approaches exist to run low-depth circuits on physical hardware.
Vendors are beginning to open this pulse-level control system to the public via specified interfaces.
arXiv Detail & Related papers (2020-03-26T15:08:32Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.