FTPrimitiveBench: A Benchmark Suite For Logical Computation Under Hardware-Motivated and Biased Noise Models

• URL: http://arxiv.org/abs/2605.04049v2
• Date: Wed, 06 May 2026 02:47:52 GMT
• Title: FTPrimitiveBench: A Benchmark Suite For Logical Computation Under Hardware-Motivated and Biased Noise Models
• Abstract summary: We introduce FTPrimitiveBench, a systematic benchmarking approach for studying how logical primitives interact with hardware-motivated noise.<n>Results extend memory benchmarks to active logical computation, where the interaction between noise structure and primitive implementation matters.
• Score: 2.3094992090533246
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Fault-tolerant quantum computing requires understanding how error-correcting codes perform on diverse physical hardware. This is typically assessed via noisy stabilizer simulation of logical circuits at HPC scale, combined with a noise model that yields a logical error rate for the relevant code distances and depths. The uniform depolarizing model is the standard baseline, but its homogeneous assumptions fail to capture the heterogeneity, asymmetries, and correlations of real devices, where Pauli, measurement, and spatio-temporal errors are not weakly coupled. Yet these same structured features create opportunities for joint code-hardware co-design, motivating noise models that more faithfully reflect target hardware while remaining tractable to simulate. We introduce FTPrimitiveBench, a systematic benchmarking approach for studying how logical primitives interact with hardware-motivated noise. It supports both custom specifications and representative structured noise families: Pauli bias, measurement bias, and spatial or spatio-temporal non-uniformity -- together with generators for core surface-code Clifford primitives: logical memory, lattice surgery, transversal logical Hadamard, and the logical phase gate via lattice surgery. We find that structured noise affects these primitives in qualitatively distinct ways, with outcomes shaped by the interplay between noise model, primitive, and decoder choice. These results extend memory benchmarks to active logical computation, where the interaction between noise structure and primitive implementation matters. By standardizing the link between noise-model specification and primitive construction, FTPrimitiveBench enables reproducible comparative studies of QEC protocols and decoders, supporting hardware-aware co-design of fault-tolerant architectures. Code: https://github.com/ShuwenKan/FTPrimitiveBench.

Related papers

• Learning Metamaterial Eigenmodes with Wavelet-Encoded Fourier Neural Operators [57.64362886310329]
  We show that a machine learning surrogate based on neural operators can learn and predict multiple eigenmodes of the elastic wave equation.<n>For metamaterial design, the resulting surrogate accelerates the simulation stage of the design cycle by three orders of magnitude relative to finite element analysis on a consumer-grade CPU.<n>These results also carry broader implications for designing input encodings in other multi-mode PDE solvers based on spectral neural operators.
  arXiv  Detail & Related papers  (2026-09-08T01:21:46Z)
• Towards the Characterization of Logical Errors in Distributed Lattice Surgery [1.9622606672571925]
  Inter-module quantum operations are noisier than intra-module local gates, which introduces additional noise into the system.<n>We analyze distributed lattice surgery under heterogeneous noise conditions, focusing in particular on the merge operation as one of its fundamental subroutines.<n>Our results provide practical insights into selecting the optimal surface-code distance, establishing target local-gate fidelities, and determining the tolerable entangled-pair fidelity required for logical operations in a distributed architecture.
  arXiv  Detail & Related papers  (2026-07-31T09:06:26Z)
• GroverFigureOfMerit: An Agnostic Figure of Merit for Quantum Backend Characterization in the NISQ Era [41.99844472131922]
  We propose a Figure of Merit based on Grover's algorithm as an algorithmic stress test evaluating quantum backend performance holistically.<n>The metric combines success probability on target states with penalties for non-uniform amplification and leakage to non-marked states, yielding a unified score across hardware architectures.
  arXiv  Detail & Related papers  (2026-07-09T16:08:48Z)
• Courant: a State-Adaptive Perceiver-Based Neural Surrogate with Local Support and Interpretable Field Decomposition [41.11599978669432]
  "Courant" is a Perceiver-based encoder-processor-decoder surrogate model.<n>It has latent features exhibiting adaptive specialization and local support in the physical space.<n>We demonstrate that Courant's inductive biases yield latents that are interpretable by design.
  arXiv  Detail & Related papers  (2026-05-24T14:55:12Z)
• The Impact of Qubit Connectivity on Quantum Advantage in Noisy IQP Circuits [12.732381296045054]
  Instantaneous Quantum Polynomial-time (IQP) circuits are a candidate for demonstrating near-term quantum advantage.<n>We show that qubit connectivity is a key parameter in this transition, since sparse architectures require additional routing to implement long-range interactions.<n>We quantify this architecture-dependent shift using the compiled depth overhead and the corresponding simulatability margin.
  arXiv  Detail & Related papers  (2026-04-14T12:06:48Z)
• Wave-Based Semantic Memory with Resonance-Based Retrieval: A Phase-Aware Alternative to Vector Embedding Stores [51.56484100374058]
  We propose a novel framework that models knowledge as wave patterns $psi(x) = A(x) eiphi(x)$ and retrieves it through resonance-based interference.<n>This approach preserves both amplitude and phase information, enabling more expressive and robust semantic similarity.
  arXiv  Detail & Related papers  (2025-08-21T10:13:24Z)
• Logical Error Rates for the Surface Code Under a Mixed Coherent and Stochastic Circuit-Level Noise Model Inspired by Trapped Ions [0.5767156832161817]
  We consider logical error rates for the surface code implemented on a hypothetical grid-based trapped-ion quantum charge-coupled device (QCCD) architecture.<n>Specifically, we construct logical channels for the idling surface code and examine its diamond error under a mixed coherent and circuit-level noise model.
  arXiv  Detail & Related papers  (2025-08-19T19:37:09Z)
• Surface Code Error Correction with Crosstalk Noise [0.6976976250169952]
  We study various types of crosstalk noise and quantify their effects on surface codes through memory and stability experiments.<n>We introduce crosstalk-robust implementations of QEC via flag qubit designs and redundant stabilizer checks.<n>Together, our analytical and numerical results shed light on designing QEC codes that are robust against hardware realistic crosstalk noise.
  arXiv  Detail & Related papers  (2025-03-06T17:32:01Z)
• Fault-tolerant quantum architectures based on erasure qubits [49.227671756557946]
  We exploit the idea of erasure qubits, relying on an efficient conversion of the dominant noise into erasures at known locations. We propose and optimize QEC schemes based on erasure qubits and the recently-introduced Floquet codes. Our results demonstrate that, despite being slightly more complex, QEC schemes based on erasure qubits can significantly outperform standard approaches.
  arXiv  Detail & Related papers  (2023-12-21T17:40:18Z)
• Accurate and Honest Approximation of Correlated Qubit Noise [39.58317527488534]
  We propose an efficient systematic construction of approximate noise channels, where their accuracy can be enhanced by incorporating noise components with higher qubit-qubit correlation degree.<n>We find that, for realistic noise strength typical for fixed-frequency superconducting qubits, correlated noise beyond two-qubit correlation can significantly affect the code simulation accuracy.
  arXiv  Detail & Related papers  (2023-11-15T19:00:34Z)
• Scalable noisy quantum circuits for biased-noise qubits [37.69303106863453]
  We consider biased-noise qubits affected only by bit-flip errors, which is motivated by existing systems of stabilized cat qubits. For realistic noise models, phase-flip will not be negligible, but in the Pauli-Twirling approximation, we show that our benchmark could check the correctness of circuits containing up to $106$ gates.
  arXiv  Detail & Related papers  (2023-05-03T11:27:50Z)
• Logical blocks for fault-tolerant topological quantum computation [55.41644538483948]
  We present a framework for universal fault-tolerant logic motivated by the need for platform-independent logical gate definitions. We explore novel schemes for universal logic that improve resource overheads. Motivated by the favorable logical error rates for boundaryless computation, we introduce a novel computational scheme.
  arXiv  Detail & Related papers  (2021-12-22T19:00:03Z)
• Efficient classical simulation and benchmarking of quantum processes in the Weyl basis [0.0]
  We develop a randomized benchmarking algorithm which uses Weyl unitaries to efficiently identify and learn a mixture of error models. We apply our methods to ansatz circuits that appear in the Variational Quantum Eigensolver.
  arXiv  Detail & Related papers  (2020-08-27T16:46:12Z)

This list is automatically generated from the titles and abstracts of the papers in this site.

This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.