Towards Deploying Optimistic Quantum Fourier Transforms: An Architecture-Algorithm Co-Design Study
- URL: http://arxiv.org/abs/2605.15297v1
- Date: Thu, 14 May 2026 18:11:04 GMT
- Title: Towards Deploying Optimistic Quantum Fourier Transforms: An Architecture-Algorithm Co-Design Study
- Abstract summary: We present an architecture-algom co-design study of the Optimistic Quantum Fourier Transform (OQFT) under a surface-code fault-tolerant execution model for reconfigurable neutral-atom hardware.<n>Our analysis identifies reaction-limited operation and demand as primary drivers of resource estimation and establishes a generalizable foundation for primitive-based architectural studies.
- Score: 0.0
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: We present an architecture-algorithm co-design study of the Optimistic Quantum Fourier Transform (OQFT) under a surface-code fault-tolerant execution model for reconfigurable neutral-atom hardware. Analyzing the OQFT structure, particularly its reliance on phase-gradient resources and small-scale blocks, highlights architectural requirements for resource mobility and parallel execution. Guided by that, we introduce a hot-zone architecture that decouples data storage from processing and dynamically routes mobile resource packages (magic-state factories, bridge qubits, and phase-gradient registers) to stationary data regions. To expose dominant costs, we route rotation insertions via catalytic phase-gradient addition and heuristically micro-schedule ripple-carry adders to patch-level moves. Under this model, leading Gidney~\cite{Gidney2018halvingcostof} and Cuccaro~\cite{cuccaro2004} adders have similar space-time volume but require different levels of parallelism. At the algorithm level, the five-layer OQFT shows a tunable parallelism/latency trade-off: two hot zones match serial-QFT latency, four hot zones roughly halve runtime, and additional hot zones asymptotically approach constant-time execution at substantial resource cost. Across 256-2048-bit instances, the requirements for half-time performance converge to about 500 additional logical ancillae and a peak parallelism of 128 logical qubits. We also identify broader algorithm-architecture bottlenecks, including endianness mismatches between phase-gradient and data registers, addressed via cyclic phase-gradient swaps and alternating QFT reflections. Scoped to surface codes and cultivation-only magic-state factories, our analysis identifies reaction-limited operation and parallelism demand as primary drivers of resource estimation and establishes a generalizable foundation for primitive-based architectural studies.
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