Full Extractors for Logical Processing in Hypergraph Product Codes

• URL: http://arxiv.org/abs/2606.03507v1
• Date: Tue, 02 Jun 2026 11:25:18 GMT
• Title: Full Extractors for Logical Processing in Hypergraph Product Codes
• Abstract summary: Quantum low-density parity-check (QLDPC) codes are promising candidates for practical low-overhead quantum memories.<n>We construct full extractors -- surgery systems capable of measuring arbitrary logical Pauli operators on a code block.<n>For a distance 10 HGP code, circuit-level noise simulations yield logical measurement error rates of approximately $10-6$ at a physical error rate of 0.1%.
• Score: 4.143735438840213
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Quantum low-density parity-check (QLDPC) codes are promising candidates for practical low-overhead quantum memories. For large-scale fault-tolerant quantum computation, we further need logical processing methods for QLDPC codes. In this work, we construct full extractors -- surgery systems capable of measuring arbitrary logical Pauli operators on a code block -- for several hypergraph product (HGP) codes. These extractors enable logical processing via Pauli-based computation (PBC) without the compilation overhead observed in prior works. Moreover, our extractors have sizes between 50% and 80% of the base HGP codes, and the extractor-augmented codes can be supported on fixed connectivity hardware with maximum qubit degree ten. Our approach involves assembling many partial extractors with verifiable fault-tolerance into a single full extractor. For a distance 10 HGP code, circuit-level noise simulations yield logical measurement error rates of approximately $10^{-6}$ at a physical error rate of 0.1%. These results demonstrate that extractor architectures, when designed in the fixed-connectivity setting, can achieve the space efficiency of QLDPC codes without introducing compilation overhead compared to surface code PBC architectures.

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