Spiking Neural Network inference on FPGAs with hls4ml

• URL: http://arxiv.org/abs/2606.10008v1
• Date: Mon, 08 Jun 2026 18:01:16 GMT
• Title: Spiking Neural Network inference on FPGAs with hls4ml
• Abstract summary: Spiking Neural Networks (SNNs) provide a naturally temporal machine-learning framework.<n>Many scientific real-time inference systems rely on synchronous field-programmable gate arrays (FPGAs) and high-level synthesis (HLS)<n>We present an extension of hls4ml that enables clock-driven deployment of SNNs trained in pytorch onto FPGA firmware.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Spiking Neural Networks (SNNs) provide a naturally temporal machine-learning framework. Their neurons maintain an internal state and propagate information through discrete spikes, enabling low-latency temporal inference. Although SNNs are often associated with asynchronous neuromorphic processors, many scientific real-time inference systems rely on conventional synchronous field-programmable gate arrays (FPGAs) and high-level synthesis (HLS) workflows. In this paper we present an extension of hls4ml that enables clock-driven deployment of SNNs trained in pytorch onto FPGA firmware. We demonstrate the workflow using a dense quantised SNN trained on the Heidelberg Spiking Digits dataset where it achieves inference latencies of approximately $34μ$s. We validate the generated design through software reference comparisons, HLS C simulation, HLS synthesis, export, and Vivado synthesis reports. This work opens up the hls4ml toolkit to neuromorphic computing, allowing streamlined optimisation, synthesis, and deployment of SNN models for real-time inference.

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