Harvest: Resource-Aware Quantum Compilation for Magic State Protocols
- URL: http://arxiv.org/abs/2608.03315v1
- Date: Tue, 04 Aug 2026 08:21:59 GMT
- Title: Harvest: Resource-Aware Quantum Compilation for Magic State Protocols
- Abstract summary: We present Harvest, a resource-aware compilation approach for lattice-surgery.<n>It co-optimizes magic-state consumption with circuit-aware placement and congestion-aware routing.<n>It achieves an average speedup of $4.83times$ (up to $17.8times$) over sequential execution.
- Score: 40.10865338207471
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Fault-tolerant quantum processors based on topological codes execute programs through lattice surgery, where operations must be mapped, routed, and supplied with magic states across a 2D grid of physical patches. Non-Clifford operations require these magic states, produced either by distillation factories or by cultivation, each trading footprint against preparation latency, and delivering a magic state to the data patches that consume it requires routing through the same shared layout as every other operation. Yet placement, routing, scheduling, and magic-state supply cannot be optimized in isolation: two operations with no circuit-level dependency can still contend for the same ports, routes, or magic-state terminals once placed, so a compiler that decouples instruction scheduling from magic-state generation, or hard-codes a single generation protocol, is forced to trade execution time against layout footprint instead of co-optimizing both across protocols. We present Harvest, a resource-aware compilation approach for lattice-surgery that co-optimizes magic-state consumption with circuit-aware placement and congestion-aware routing under a protocol-agnostic resource model, then reclaims unused layout footprint after scheduling. Across standard benchmark suites (QAOA, QFT, QASMBench), Harvest achieves an average speedup of $4.83\times$ (up to $17.8\times$) over sequential execution, improves schedule length by up to $1.35\times$ through circuit-aware placement, and reclaims up to $72.0\%$ of unused magic-state patches and $33.9\%$ of unused routing patches.
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