Iterative Circuit Repair Against Formal Specifications

• URL: http://arxiv.org/abs/2303.01158v1
• Date: Thu, 2 Mar 2023 11:05:10 GMT
• Title: Iterative Circuit Repair Against Formal Specifications
• Authors: Matthias Cosler, Frederik Schmitt, Christopher Hahn, Bernd Finkbeiner
• Abstract summary: We present a deep learning approach for repairing sequential circuits against formal specifications given in linear-time temporal logic (LTL) We propose a separated hierarchical Transformer for multimodal representation learning of the formal specification and the circuit. Our proposed repair mechanism significantly improves the automated synthesis of circuits from specifications with Transformers.
• Score: 3.7277730514654555
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: We present a deep learning approach for repairing sequential circuits against formal specifications given in linear-time temporal logic (LTL). Given a defective circuit and its formal specification, we train Transformer models to output circuits that satisfy the corresponding specification. We propose a separated hierarchical Transformer for multimodal representation learning of the formal specification and the circuit. We introduce a data generation algorithm that enables generalization to more complex specifications and out-of-distribution datasets. In addition, our proposed repair mechanism significantly improves the automated synthesis of circuits from LTL specifications with Transformers. It improves the state-of-the-art by $6.8$ percentage points on held-out instances and $11.8$ percentage points on an out-of-distribution dataset from the annual reactive synthesis competition.

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