Hierarchical memories: Simulating quantum LDPC codes with local gates
- URL: http://arxiv.org/abs/2303.04798v1
- Date: Wed, 8 Mar 2023 18:48:12 GMT
- Title: Hierarchical memories: Simulating quantum LDPC codes with local gates
- Authors: Christopher A. Pattison, Anirudh Krishna, John Preskill
- Abstract summary: Constant-rate low-density parity-check (LDPC) codes are promising candidates for constructing efficient fault-tolerant quantum memories.
We construct a new family of hierarchical codes, that encode a number of logical qubits K = Omega(N/log(N)2.
Under conservative assumptions, we find that the hierarchical code outperforms the basic encoding where all logical qubits are encoded in the surface code.
- Score: 0.05156484100374058
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Constant-rate low-density parity-check (LDPC) codes are promising candidates
for constructing efficient fault-tolerant quantum memories. However, if
physical gates are subject to geometric-locality constraints, it becomes
challenging to realize these codes. In this paper, we construct a new family of
[[N,K,D]] codes, referred to as hierarchical codes, that encode a number of
logical qubits K = Omega(N/\log(N)^2). The N-th element of this code family is
obtained by concatenating a constant-rate quantum LDPC code with a surface
code; nearest-neighbor gates in two dimensions are sufficient to implement the
corresponding syndrome-extraction circuit and achieve a threshold. Below
threshold the logical failure rate vanishes superpolynomially as a function of
the distance D(N). We present a bilayer architecture for implementing the
syndrome-extraction circuit, and estimate the logical failure rate for this
architecture. Under conservative assumptions, we find that the hierarchical
code outperforms the basic encoding where all logical qubits are encoded in the
surface code.
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