Distributed Compressed Sparse Row Format for Spiking Neural Network Simulation, Serialization, and Interoperability

• URL: http://arxiv.org/abs/2304.05587v1
• Date: Wed, 12 Apr 2023 03:19:06 GMT
• Title: Distributed Compressed Sparse Row Format for Spiking Neural Network Simulation, Serialization, and Interoperability
• Authors: Felix Wang
• Abstract summary: We discuss a parallel extension of a widely used format for efficiently representing sparse matrices, the compressed sparse row (CSR) We contend that organizing additional network information, such as neuron and synapse state, in alignment with its adjacency as dCSR provides a straightforward partition-based distribution of network state. We provide a potential implementation, and put it forward for adoption within the neural computing community.
• Score: 0.48733623015338234
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: With the increasing development of neuromorphic platforms and their related software tools as well as the increasing scale of spiking neural network (SNN) models, there is a pressure for interoperable and scalable representations of network state. In response to this, we discuss a parallel extension of a widely used format for efficiently representing sparse matrices, the compressed sparse row (CSR), in the context of supporting the simulation and serialization of large-scale SNNs. Sparse matrices for graph adjacency structure provide a natural fit for describing the connectivity of an SNN, and prior work in the area of parallel graph partitioning has developed the distributed CSR (dCSR) format for storing and ingesting large graphs. We contend that organizing additional network information, such as neuron and synapse state, in alignment with its adjacency as dCSR provides a straightforward partition-based distribution of network state. For large-scale simulations, this means each parallel process is only responsible for its own partition of state, which becomes especially useful when the size of an SNN exceeds the memory resources of a single compute node. For potentially long-running simulations, this also enables network serialization to and from disk (e.g. for checkpoint/restart fault-tolerant computing) to be performed largely independently between parallel processes. We also provide a potential implementation, and put it forward for adoption within the neural computing community.

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