CircuitVAE: Efficient and Scalable Latent Circuit Optimization

• URL: http://arxiv.org/abs/2406.09535v1
• Date: Thu, 13 Jun 2024 18:47:52 GMT
• Title: CircuitVAE: Efficient and Scalable Latent Circuit Optimization
• Authors: Jialin Song, Aidan Swope, Robert Kirby, Rajarshi Roy, Saad Godil, Jonathan Raiman, Bryan Catanzaro,
• Abstract summary: CircuitVAE is a search algorithm that embeds computation graphs in a continuous space. Our algorithm is highly sample-efficient, yet gracefully scales to large problem instances and high sample budgets. We find CircuitVAE can design state-of-the-art adders in a real-world chip, demonstrating that our method can outperform commercial tools in a realistic setting.
• Score: 22.93567682576068
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Automatically designing fast and space-efficient digital circuits is challenging because circuits are discrete, must exactly implement the desired logic, and are costly to simulate. We address these challenges with CircuitVAE, a search algorithm that embeds computation graphs in a continuous space and optimizes a learned surrogate of physical simulation by gradient descent. By carefully controlling overfitting of the simulation surrogate and ensuring diverse exploration, our algorithm is highly sample-efficient, yet gracefully scales to large problem instances and high sample budgets. We test CircuitVAE by designing binary adders across a large range of sizes, IO timing constraints, and sample budgets. Our method excels at designing large circuits, where other algorithms struggle: compared to reinforcement learning and genetic algorithms, CircuitVAE typically finds 64-bit adders which are smaller and faster using less than half the sample budget. We also find CircuitVAE can design state-of-the-art adders in a real-world chip, demonstrating that our method can outperform commercial tools in a realistic setting.

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