Single-qubit gates with errors at the $10^{-7}$ level

• URL: http://arxiv.org/abs/2412.04421v1
• Date: Thu, 05 Dec 2024 18:45:29 GMT
• Title: Single-qubit gates with errors at the $10^{-7}$ level
• Authors: M. C. Smith, A. D. Leu, K. Miyanishi, M. F. Gely, D. M. Lucas,
• Abstract summary: We report the achievement of single-qubit gates with sub-part-per-million error rates, in a trapped-ion $43$Ca$+$ hyperfine clock qubit.
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• Abstract: We report the achievement of single-qubit gates with sub-part-per-million error rates, in a trapped-ion $^{43}$Ca$^{+}$ hyperfine clock qubit. We explore the speed/fidelity trade-off for gate times $4.4\leq t_{g}\leq35~\mu$s, and benchmark a minimum error of $1.5(4) \times 10^{-7}$. Gate calibration errors are suppressed to $< 10^{-8}$, leaving qubit decoherence ($T_{2}\approx 70$ s), leakage and measurement as the dominant error contributions. The ion is held above a microfabricated surface-electrode trap which incorporates a chip-integrated microwave resonator for electronic qubit control; the trap is operated at room temperature without magnetic shielding.

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