Cryogenic Thermal Modeling of Microwave High Density Signaling

• URL: http://arxiv.org/abs/2502.01945v1
• Date: Tue, 04 Feb 2025 02:38:24 GMT
• Title: Cryogenic Thermal Modeling of Microwave High Density Signaling
• Authors: Naomi Raicu, Tom Hogan, Xian Wu, Mehrnoosh Vahidpour, David Snow, Matthew Hollister, Mark Field,
• Abstract summary: Superconducting quantum computers require control lines running from room temperature to the mixing chamber of a dilution refrigerator. We investigate the thermal load of SC-086/50-SCN-CN semi-rigid coaxial cable. We conclude that the theoretical upper limit of the described architecture is approximately 200 qubits.
• Score: 21.723487348914958
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• Abstract: Superconducting quantum computers require microwave control lines running from room temperature to the mixing chamber of a dilution refrigerator. Adding more lines without preliminary thermal modeling to make predictions risks overwhelming the cooling power at each thermal stage. In this paper, we investigate the thermal load of SC-086/50-SCN-CN semi-rigid coaxial cable, which is commonly used for the control and readout lines of a superconducting quantum computer, as we increase the number of lines to a quantum processor. We investigate the makeup of the coaxial cables, verify the materials and dimensions, and experimentally measure the total thermal conductivity of a single cable as a function of the temperature from cryogenic to room temperature values. We also measure the cryogenic DC electrical resistance of the inner conductor as a function of temperature, allowing for the calculation of active thermal loads due to Ohmic heating. Fitting this data produces a numerical thermal conductivity function used to calculate the static heat loads due to thermal transfer within the wires resulting from a temperature gradient. The resistivity data is used to calculate active heat loads, and we use these fits in a cryogenic model of a superconducting quantum processor in a typical Bluefors XLD1000-SL dilution refrigerator, investigating how the thermal load increases with processor sizes ranging from 100 to 225 qubits. We conclude that the theoretical upper limit of the described architecture is approximately 200 qubits. However, including an engineering margin in the cooling power and the available space for microwave readout circuitry at the mixing chamber, the practical limit will be approximately 140 qubits.

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