Simulating Quantum Circuits with Tree Tensor Networks using Density-Matrix Renormalization Group Algorithm

• URL: http://arxiv.org/abs/2504.16718v2
• Date: Wed, 30 Apr 2025 11:59:07 GMT
• Title: Simulating Quantum Circuits with Tree Tensor Networks using Density-Matrix Renormalization Group Algorithm
• Authors: Aditya Dubey, Zeki Zeybek, Peter Schmelcher,
• Abstract summary: We extend the Density-Matrix Renormalization Group (DMRG) algorithm for simulating quantum circuits to tree tensor networks (TTNs)<n>TTNs provide a promising framework for simulating quantum circuits, particularly when gate connectivities exhibit clustering or a hierarchical structure.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Quantum computing offers the potential for computational abilities that can go beyond classical machines. However, they are still limited by several challenges such as noise, decoherence, and gate errors. As a result, efficient classical simulation of quantum circuits is vital not only for validating and benchmarking quantum hardware but also for gaining deeper insights into the behavior of quantum algorithms. A promising framework for classical simulation is provided by tensor networks. Recently, the Density-Matrix Renormalization Group (DMRG) algorithm was developed for simulating quantum circuits using matrix product states (MPS). Although MPS is efficient for representing quantum states with one-dimensional correlation structures, the fixed linear geometry restricts the expressive power of the MPS. In this work, we extend the DMRG algorithm for simulating quantum circuits to tree tensor networks (TTNs). The framework allows us to preserve the TTN structure upon application of gates. To benchmark the method, we simulate random and QAOA circuits with various two-qubit gate connectivities. For the random circuits, we devise tree-like gate layouts that are suitable for TTN and show that TTN requires less memory than MPS for the simulations. For the QAOA circuits, a TTN construction that exploits graph structure significantly improves the simulation fidelities. Our findings show that TTNs provide a promising framework for simulating quantum circuits, particularly when gate connectivities exhibit clustering or a hierarchical structure.

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