Assessing the Performance of Analog Training for Transfer Learning
- URL: http://arxiv.org/abs/2505.11067v1
- Date: Fri, 16 May 2025 10:02:32 GMT
- Title: Assessing the Performance of Analog Training for Transfer Learning
- Authors: Omobayode Fagbohungbe, Corey Lammie, Malte J. Rasch, Takashi Ando, Tayfun Gokmen, Vijay Narayanan,
- Abstract summary: Analog in-memory computing promises fast, parallel, and energy-efficient deep learning training and transfer learning.<n>A new algorithm chopped TTv2 (c-TTv2) has been introduced, which leverages the chopped technique to address many of the challenges mentioned above.<n>In this paper, we assess the performance of the c-TTv2 algorithm for analog TL using a Swin-ViT model on a subset of the CIFAR100 dataset.
- Score: 0.26388783516590225
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: Analog in-memory computing is a next-generation computing paradigm that promises fast, parallel, and energy-efficient deep learning training and transfer learning (TL). However, achieving this promise has remained elusive due to a lack of suitable training algorithms. Analog memory devices exhibit asymmetric and non-linear switching behavior in addition to device-to-device variation, meaning that most, if not all, of the current off-the-shelf training algorithms cannot achieve good training outcomes. Also, recently introduced algorithms have enjoyed limited attention, as they require bi-directionally switching devices of unrealistically high symmetry and precision and are highly sensitive. A new algorithm chopped TTv2 (c-TTv2), has been introduced, which leverages the chopped technique to address many of the challenges mentioned above. In this paper, we assess the performance of the c-TTv2 algorithm for analog TL using a Swin-ViT model on a subset of the CIFAR100 dataset. We also investigate the robustness of our algorithm to changes in some device specifications, including weight transfer noise, symmetry point skew, and symmetry point variability
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