Comparing a Few Qubit Systems for Superconducting Hardware Compatibility and Circuit Design Sensitivity in Qiskit

• URL: http://arxiv.org/abs/2506.14075v1
• Date: Tue, 17 Jun 2025 00:18:46 GMT
• Title: Comparing a Few Qubit Systems for Superconducting Hardware Compatibility and Circuit Design Sensitivity in Qiskit
• Authors: Hillol Biswas,
• Abstract summary: This work implements three base circuits for different qubit systems in the simulator and corresponding 127-qubit IBM Sherbrooke superconducting quantum processing units (QPU)<n>It explores the tradeoff between generalizability, sensitivity of circuit design to parameters, noise resilience, resource planning, and efficient qubit usage insights.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: In the current quantum computing ecosystem, building complex and integrated circuits for addressing real-world problems often involves using basic historical components like Bell states to take advantage of superposition, entanglement, and coherence. The availability of the simulator and the IBM quantum computing endeavor through Qiskit further broadens the scope of application based on domain use. In the NISQ era, however, error mitigation is a criterion that is applied when comparing a QPU run result with the simulator. As the real-world scope of application for quantum computing is being broadened, using simulators as a baseline offers confidence; however, concerns about computation resources and availability arise in the high-speed computational regime. As complex problems entail using a larger number of superconducting physical qubits, what should be the basis of framing a quantum circuit for building quantum algorithms in a real-world scenario, given hardware compatibility that should ideally provide confidence baselining with the simulator outcome? This work implements three base circuits for different qubit systems in the simulator and corresponding 127-qubit IBM Sherbrooke superconducting quantum processing units (QPU) to explore the tradeoff between generalizability, sensitivity of circuit design to parameters, noise resilience, resource planning, and efficient qubit usage insights.

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