Graph Neural Network-Based Predictor for Optimal Quantum Hardware Selection

• URL: http://arxiv.org/abs/2507.19093v2
• Date: Mon, 04 Aug 2025 07:16:52 GMT
• Title: Graph Neural Network-Based Predictor for Optimal Quantum Hardware Selection
• Authors: Antonio Tudisco, Deborah Volpe, Giacomo Orlandi, Giovanna Turvani,
• Abstract summary: We propose a Graph Neural Network (GNN)-based predictor that automates hardware selection.<n>By exploiting graph-based machine learning, our approach avoids extracting the circuit features for the model evaluation.<n> Experimental results prove 94.4% accuracy and an 85.5% F1 score for the minority class, effectively predicting the best compilation target.
• Score: 0.21845291030915975
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: The growing variety of quantum hardware technologies, each with unique peculiarities such as connectivity and native gate sets, creates challenges when selecting the best platform for executing a specific quantum circuit. This selection process usually involves a brute-force approach: compiling the circuit on various devices and evaluating performance based on factors such as circuit depth and gate fidelity. However, this method is computationally expensive and does not scale well as the number of available quantum processors increases. In this work, we propose a Graph Neural Network (GNN)-based predictor that automates hardware selection by analyzing the Directed Acyclic Graph (DAG) representation of a quantum circuit. Our study evaluates 498 quantum circuits (up to 27 qubits) from the MQT Bench dataset, compiled using Qiskit on four devices: three superconducting quantum processors (IBM-Kyiv, IBM-Brisbane, IBM-Sherbrooke) and one trapped-ion processor (IONQ-Forte). Performance is estimated using a metric that integrates circuit depth and gate fidelity, resulting in a dataset where 93 circuits are optimally compiled on the trapped-ion device, while the remaining circuits prefer superconducting platforms. By exploiting graph-based machine learning, our approach avoids extracting the circuit features for the model evaluation but directly embeds it as a graph, significantly accelerating the optimal target decision-making process and maintaining all the information. Experimental results prove 94.4% accuracy and an 85.5% F1 score for the minority class, effectively predicting the best compilation target. The developed code is publicly available on GitHub (https://github.com/antotu/GNN-Model-Quantum-Predictor).

Related papers

• Optimization and Synthesis of Quantum Circuits with Global Gates [44.99833362998488]
  We use global interactions, such as the Global Molmer-Sorensen gate present in ion trap hardware, to optimize and synthesize quantum circuits.<n>The algorithm is based on the ZX-calculus and uses a specialized circuit extraction routine that groups entangling gates into Global MolmerSorensen gates.<n>We benchmark the algorithm in a variety of circuits, and show how it improves their performance under state-of-the-art hardware considerations.
  arXiv  Detail & Related papers  (2025-07-28T10:25:31Z)
• HaQGNN: Hardware-Aware Quantum Kernel Design Based on Graph Neural Networks [18.080290351942736]
  HaQGNN is a hardware-aware quantum kernel design method that integrates quantum device topology, noise characteristics, and Graph Neural Networks (GNNs)<n>Our results highlight the potential of learning-based and hardware-aware strategies for advancing practical quantum kernel design on near-term quantum hardware.
  arXiv  Detail & Related papers  (2025-06-26T11:38:54Z)
• An Efficient Quantum Classifier Based on Hamiltonian Representations [50.467930253994155]
  Quantum machine learning (QML) is a discipline that seeks to transfer the advantages of quantum computing to data-driven tasks.<n>We propose an efficient approach that circumvents the costs associated with data encoding by mapping inputs to a finite set of Pauli strings.<n>We evaluate our approach on text and image classification tasks, against well-established classical and quantum models.
  arXiv  Detail & Related papers  (2025-04-13T11:49:53Z)
• Evaluating the performance of quantum processing units at large width and depth [0.40964539027092917]
  We introduce a benchmarking protocol based on the linear ramp quantum approximate optimization algorithm (LR-QAOA)<n>LR-QAOA quantifies a QPU's ability to preserve a coherent signal as circuit depth increases, identifying when performance becomes statistically indistinguishable from random sampling.<n>We apply this protocol to 24 quantum processors from six vendors, testing problems with up to 156 qubits and 10,000 layers across 1D-chains, native layouts, and fully connected topologies.
  arXiv  Detail & Related papers  (2025-02-10T13:50:50Z)
• Q-gen: A Parameterized Quantum Circuit Generator [0.6062751776009752]
  We introduce Q-gen, a high-level, parameterized quantum circuit generator incorporating 15 realistic quantum algorithms.<n>Q-gen is an open-source project that serves as the entrance for users with a classical computer science background to dive into the world of quantum computing.
  arXiv  Detail & Related papers  (2024-07-26T12:22:40Z)
• Supervised binary classification of small-scale digit images and weighted graphs with a trapped-ion quantum processor [56.089799129458875]
  We present the results of benchmarking a quantum processor based on trapped $171$Yb$+$ ions.<n>We perform a supervised binary classification on two types of datasets: small binary digit images and weighted graphs with a ring topology.
  arXiv  Detail & Related papers  (2024-06-17T18:20:51Z)
• On-Chip Hardware-Aware Quantization for Mixed Precision Neural Networks [52.97107229149988]
  We propose an On-Chip Hardware-Aware Quantization framework, performing hardware-aware mixed-precision quantization on deployed edge devices. For efficiency metrics, we built an On-Chip Quantization Aware pipeline, which allows the quantization process to perceive the actual hardware efficiency of the quantization operator. For accuracy metrics, we propose Mask-Guided Quantization Estimation technology to effectively estimate the accuracy impact of operators in the on-chip scenario.
  arXiv  Detail & Related papers  (2023-09-05T04:39:34Z)
• Majorization-based benchmark of the complexity of quantum processors [105.54048699217668]
  We numerically simulate and characterize the operation of various quantum processors. We identify and assess quantum complexity by comparing the performance of each device against benchmark lines. We find that the majorization-based benchmark holds as long as the circuits' output states have, on average, high purity.
  arXiv  Detail & Related papers  (2023-04-10T23:01:10Z)
• Interaction graph-based characterization of quantum benchmarks for improving quantum circuit mapping techniques [1.351147045576948]
  We propose to extend the characterization of quantum circuits by including qubit interaction graph properties. Our study reveals a correlation between interaction graph-based parameters and mapping performance metrics for various existing configurations of quantum devices.
  arXiv  Detail & Related papers  (2022-12-13T15:24:37Z)
• TopGen: Topology-Aware Bottom-Up Generator for Variational Quantum Circuits [26.735857677349628]
  Variational Quantum Algorithms (VQA) are promising to demonstrate quantum advantages on near-term devices. Designing ansatz, a variational circuit with parameterized gates, is of paramount importance for VQA. We propose a bottom-up approach to generate topology-specific ansatz.
  arXiv  Detail & Related papers  (2022-10-15T04:18:41Z)
• Automatic and effective discovery of quantum kernels [41.61572387137452]
  Quantum computing can empower machine learning models by enabling kernel machines to leverage quantum kernels for representing similarity measures between data.<n>We present an approach to this problem, which employs optimization techniques, similar to those used in neural architecture search and AutoML.<n>The results obtained by testing our approach on a high-energy physics problem demonstrate that, in the best-case scenario, we can either match or improve testing accuracy with respect to the manual design approach.
  arXiv  Detail & Related papers  (2022-09-22T16:42:14Z)
• Hardware-Conscious Optimization of the Quantum Toffoli Gate [11.897854272643634]
  This manuscript expands the analytical and numerical approaches for optimizing quantum circuits at this abstraction level. We present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. Our optimized Toffoli gate implementation demonstrates an $18%$ reduction in infidelity compared with the canonical implementation.
  arXiv  Detail & Related papers  (2022-09-06T17:29:22Z)
• Quantum circuit debugging and sensitivity analysis via local inversions [62.997667081978825]
  We present a technique that pinpoints the sections of a quantum circuit that affect the circuit output the most. We demonstrate the practicality and efficacy of the proposed technique by applying it to example algorithmic circuits implemented on IBM quantum machines.
  arXiv  Detail & Related papers  (2022-04-12T19:39:31Z)
• QUANTIFY: A framework for resource analysis and design verification of quantum circuits [69.43216268165402]
  QUANTIFY is an open-source framework for the quantitative analysis of quantum circuits. It is based on Google Cirq and is developed with Clifford+T circuits in mind. For benchmarking purposes QUANTIFY includes quantum memory and quantum arithmetic circuits.
  arXiv  Detail & Related papers  (2020-07-21T15:36:25Z)

This list is automatically generated from the titles and abstracts of the papers in this site.

This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.