Neural Network Architectures for Scalable Quantum State Tomography: Benchmarking and Memristor-Based Acceleration

• URL: http://arxiv.org/abs/2507.23007v1
• Date: Wed, 30 Jul 2025 18:12:10 GMT
• Title: Neural Network Architectures for Scalable Quantum State Tomography: Benchmarking and Memristor-Based Acceleration
• Authors: Erbing Hua, Steven van Ommen, King Yiu Yu, Jim van Leeuven, Rajendra Bishnoi, Heba Abunahla, Salahuddin Nur, Sebastian Feld, Ryoichi Ishihara,
• Abstract summary: Quantum State Tomography (QST) is essential for characterizing and validating quantum systems.<n>Prior claims of performance have relied on architectural assumptions rather than systematic validation.<n>We benchmark several neural network architectures to determine which scale effectively with qubit number and which fail to maintain high fidelity as system size increases.
• Score: 0.9572566550427288
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Quantum State Tomography (QST) is essential for characterizing and validating quantum systems, but its practical use is severely limited by the exponential growth of the Hilbert space and the number of measurements required for informational completeness. Many prior claims of performance have relied on architectural assumptions rather than systematic validation. We benchmark several neural network architectures to determine which scale effectively with qubit number and which fail to maintain high fidelity as system size increases.To address this, we perform a comprehensive benchmarking of diverse neural architectures across two quantum measurement strategies to evaluate their effectiveness in reconstructing both pure and mixed quantum states. Our results reveal that CNN and CGAN scale more robustly and achieve the highest fidelities, while Spiking Variational Autoencoder (SVAE) demonstrates moderate fidelity performance, making it a strong candidate for embedded, low-power hardware implementations.Recognizing that practical quantum diagnostics will require embedded, energy-efficient computation, we also discuss how memristor-based Computation-in-Memory (CiM) platforms can accelerate these models in hardware, mitigating memory bottlenecks and reducing energy consumption to enable scalable in-situ QST. This work identifies which architectures scale favorably for future quantum systems and lays the groundwork for quantum-classical co-design that is both computationally and physically scalable.

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