IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
- URL: http://arxiv.org/abs/2508.12846v1
- Date: Mon, 18 Aug 2025 11:33:32 GMT
- Title: IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
- Authors: Wiktor J. Szczerek, Artur Podobas,
- Abstract summary: Spiking Neural Network processing promises high energy efficiency due to the sparsity of the spiking events.<n>We present the first step towards realizing a large-scale system based on the RISC-V-compliant processor called IzhiRISC-V.
- Score: 0.0
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Spiking Neural Network processing promises to provide high energy efficiency due to the sparsity of the spiking events. However, when realized on general-purpose hardware -- such as a RISC-V processor -- this promise can be undermined and overshadowed by the inefficient code, stemming from repeated usage of basic instructions for updating all the neurons in the network. One of the possible solutions to this issue is the introduction of a custom ISA extension with neuromorphic instructions for spiking neuron updating, and realizing those instructions in bespoke hardware expansion to the existing ALU. In this paper, we present the first step towards realizing a large-scale system based on the RISC-V-compliant processor called IzhiRISC-V, supporting the custom neuromorphic ISA extension.
Related papers
- From RISC-V Cores to Neuromorphic Arrays: A Tutorial on Building Scalable Digital Neuromorphic Processors [0.37863160479533026]
Digital neuromorphic processors are emerging as a promising computing substrate for low-power, always-on EdgeAI applications.<n>This tutorial paper outlines the main architectural design principles behind fully digital neuromorphic processors.
arXiv Detail & Related papers (2025-11-27T14:14:23Z) - Retrospective: A CORDIC Based Configurable Activation Function for NN Applications [1.3133581869733064]
CORDIC-based configuration for the design of Activation Functions (AF) was previously suggested to accelerate ASIC hardware design for resource-constrained systems.<n>We introduce the DA-VINCI AF tailored for the evolving needs of AI applications.
arXiv Detail & Related papers (2025-03-18T15:38:37Z) - Advancing Spatio-Temporal Processing in Spiking Neural Networks through Adaptation [6.233189707488025]
neural networks on neuromorphic hardware promise orders of less power consumption than their non-spiking counterparts.<n>Standard neuron model for spike-based computation on such systems has long been the integrate-and-fire (LIF) neuron.<n>The root of these so-called adaptive LIF neurons is not well understood.
arXiv Detail & Related papers (2024-08-14T12:49:58Z) - Analytic Convolutional Layer: A Step to Analytic Neural Network [15.596391258983463]
Analytic Convolutional Layer (ACL) is a mosaic of analytical convolution kernels (ACKs) and traditional convolution kernels.
ACLs offer a means for neural network interpretation, thereby paving the way for the intrinsic interpretability of neural network.
arXiv Detail & Related papers (2024-07-03T07:10:54Z) - RISC-V R-Extension: Advancing Efficiency with Rented-Pipeline for Edge DNN Processing [0.8192907805418583]
This paper introduces the RISC-V R-extension, a novel approach to enhancing deep neural network (DNN) process efficiency on edge devices.
The extension features rented-pipeline stages and architectural pipeline registers (APR), which optimize critical operation execution, thereby reducing latency and memory access frequency.
arXiv Detail & Related papers (2024-07-02T19:25:05Z) - The Role of Foundation Models in Neuro-Symbolic Learning and Reasoning [54.56905063752427]
Neuro-Symbolic AI (NeSy) holds promise to ensure the safe deployment of AI systems.
Existing pipelines that train the neural and symbolic components sequentially require extensive labelling.
New architecture, NeSyGPT, fine-tunes a vision-language foundation model to extract symbolic features from raw data.
arXiv Detail & Related papers (2024-02-02T20:33:14Z) - Intelligence Processing Units Accelerate Neuromorphic Learning [52.952192990802345]
Spiking neural networks (SNNs) have achieved orders of magnitude improvement in terms of energy consumption and latency.
We present an IPU-optimized release of our custom SNN Python package, snnTorch.
arXiv Detail & Related papers (2022-11-19T15:44:08Z) - Fluid Batching: Exit-Aware Preemptive Serving of Early-Exit Neural
Networks on Edge NPUs [74.83613252825754]
"smart ecosystems" are being formed where sensing happens concurrently rather than standalone.
This is shifting the on-device inference paradigm towards deploying neural processing units (NPUs) at the edge.
We propose a novel early-exit scheduling that allows preemption at run time to account for the dynamicity introduced by the arrival and exiting processes.
arXiv Detail & Related papers (2022-09-27T15:04:01Z) - Phase Configuration Learning in Wireless Networks with Multiple
Reconfigurable Intelligent Surfaces [50.622375361505824]
Reconfigurable Intelligent Surfaces (RISs) are highly scalable technology capable of offering dynamic control of electro-magnetic wave propagation.
One of the major challenges with RIS-empowered wireless communications is the low-overhead dynamic configuration of multiple RISs.
We devise low-complexity supervised learning approaches for the RISs' phase configurations.
arXiv Detail & Related papers (2020-10-09T05:35:27Z) - Lipschitz Recurrent Neural Networks [100.72827570987992]
We show that our Lipschitz recurrent unit is more robust with respect to input and parameter perturbations as compared to other continuous-time RNNs.
Our experiments demonstrate that the Lipschitz RNN can outperform existing recurrent units on a range of benchmark tasks.
arXiv Detail & Related papers (2020-06-22T08:44:52Z) - RIS Enhanced Massive Non-orthogonal Multiple Access Networks: Deployment
and Passive Beamforming Design [116.88396201197533]
A novel framework is proposed for the deployment and passive beamforming design of a reconfigurable intelligent surface (RIS)
The problem of joint deployment, phase shift design, as well as power allocation is formulated for maximizing the energy efficiency.
A novel long short-term memory (LSTM) based echo state network (ESN) algorithm is proposed to predict users' tele-traffic demand by leveraging a real dataset.
A decaying double deep Q-network (D3QN) based position-acquisition and phase-control algorithm is proposed to solve the joint problem of deployment and design of the RIS.
arXiv Detail & Related papers (2020-01-28T14:37:38Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.