Compilation Pipeline for Predicting Algorithmic Break-Even in an Early-Fault-Tolerant Surface Code Architecture
- URL: http://arxiv.org/abs/2511.20947v1
- Date: Wed, 26 Nov 2025 00:52:53 GMT
- Title: Compilation Pipeline for Predicting Algorithmic Break-Even in an Early-Fault-Tolerant Surface Code Architecture
- Authors: Tianyi Hao, Joseph Sullivan, Sivaprasad Omanakuttan, Michael A. Perlin, Ruslan Shaydulin,
- Abstract summary: We develop a pipeline for compiling logical algorithms to physical circuits implementing lattice surgery on the surface code.<n>We use this pipeline to identify the requirements for achieving algorithmic break-even with near-term quantum hardware.<n>Our work paves the way towards an end-to-end compiler for early-fault-tolerant surface code architectures.
- Score: 1.0642813957137112
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: Recent experimental progress in realizing surface code on hardware, including demonstrations of break-even logical memory on devices with up to hundreds of physical qubits, has materially advanced the prospects for fault-tolerant quantum computation. This progress creates urgency for the development of compilation workflows that directly target the forthcoming generation of devices with thousands of physical qubits, for which algorithm execution becomes practical. We develop a pipeline for compiling logical algorithms to physical circuits implementing lattice surgery on the surface code, and use this pipeline to identify the requirements for achieving algorithmic break-even -- where quantum error correction improves the performance of a quantum algorithm -- for two prominent quantum algorithms: the quantum approximate optimization algorithm (QAOA) and quantum phase estimation (QPE). Our pipeline integrates several open-source software tools, and leverages recent advances in error-aware unitary gate synthesis, high-fidelity magic state production, and the calculation of correlation surfaces in the surface code. We perform classical simulations of physical Clifford proxy circuits produced by our pipeline, and find that both 5-qubit QAOA and QPE can reach algorithmic break-even with 2517 physical qubits (surface code distance $d=11$) at physical error rates of $p=10^{-3}$, or 1737 physical qubits ($d=9$) at $p=5\times 10^{-4}$. Our work thereby identifies conditions for achieving algorithmic break-even with near-term quantum hardware and paves the way towards an end-to-end compiler for early-fault-tolerant surface code architectures.
Related papers
- Investigation of Hardware Architecture Effects on Quantum Algorithm Performance: A Comparative Hardware Study [0.0]
Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms.<n>We benchmark five representative quantum algorithms across trapped-ion, superconducting, and simulator backends using Amazon Braket.
arXiv Detail & Related papers (2026-01-07T15:29:52Z) - Exploiting Movable Logical Qubits for Lattice Surgery Compilation [43.290156259065554]
We introduce a paradigm shift by exploiting movable logical qubits via teleportation during the logical lattice surgery CNOT gate.<n> Numerical simulations show that the proposed approach can substantially reduce the routed circuit depth.<n>An open-source implementation of our method is available on GitHub.
arXiv Detail & Related papers (2025-12-03T19:00:04Z) - Towards Efficient Verification of Computation in Quantum Devices [12.146871607856037]
Traditional methods of comprehensively verifying quantum devices, such as quantum process tomography, face significant limitations because of the exponential growth in computational resources.<n>In this paper, we investigate the structure of computations on the hardware, focusing on the layered interruptible quantum circuit model.<n>Our method completely reconstructs the circuits within a time complexity of $O(d2 t log (n/delta))$, guaranteeing success with a probability of at least $1-delta$.<n>Our approach significantly reduces execution time for completely verifying computations in quantum devices, achieving double logarithmic scaling in the problem size.
arXiv Detail & Related papers (2025-08-01T02:10:06Z) - Resource Analysis of Low-Overhead Transversal Architectures for Reconfigurable Atom Arrays [38.6948808036416]
We present a low-overhead architecture that supports the layout and resource estimation of large-scale fault-tolerant quantum algorithms.<n>We find that a 2048-bit RSA factoring can be executed with 19 million qubits in 5.6 days, for 1 ms QEC cycle times.
arXiv Detail & Related papers (2025-05-21T18:00:18Z) - Diversity Methods for Improving Convergence and Accuracy of Quantum Error Correction Decoders Through Hardware Emulation [0.46873264197900916]
This paper introduces a hardware emulator to evaluate quantum error correction decoders using real hardware instead of software models.<n>The emulator can explore $1013$ different error patterns in 20 days with a single FPGA device running at 150 MHz.<n>An optimized C++ software on an Intel Core i9 with 128 GB RAM would take over a year to achieve similar results.
arXiv Detail & Related papers (2025-04-01T20:04:27Z) - Route-Forcing: Scalable Quantum Circuit Mapping for Scalable Quantum Computing Architectures [41.39072840772559]
Route-Forcing is a quantum circuit mapping algorithm that shows an average speedup of $3.7times$.
We present a quantum circuit mapping algorithm that shows an average speedup of $3.7times$ compared to the state-of-the-art scalable techniques.
arXiv Detail & Related papers (2024-07-24T14:21:41Z) - Quantum Compiling with Reinforcement Learning on a Superconducting Processor [55.135709564322624]
We develop a reinforcement learning-based quantum compiler for a superconducting processor.
We demonstrate its capability of discovering novel and hardware-amenable circuits with short lengths.
Our study exemplifies the codesign of the software with hardware for efficient quantum compilation.
arXiv Detail & Related papers (2024-06-18T01:49:48Z) - A Fast and Adaptable Algorithm for Optimal Multi-Qubit Pathfinding in Quantum Circuit Compilation [0.0]
This work focuses on multi-qubit pathfinding as a critical subroutine within the quantum circuit compilation mapping problem.
We introduce an algorithm, modelled using binary integer linear programming, that navigates qubits on quantum hardware optimally with respect to circuit SWAP-gate depth.
We have benchmarked the algorithm across a variety of quantum hardware layouts, assessing properties such as computational runtimes, solution SWAP depths, and accumulated SWAP-gate error rates.
arXiv Detail & Related papers (2024-05-29T05:59:15Z) - Early Fault-Tolerant Quantum Computing [0.0]
We develop a model for the performance of early fault-tolerant quantum computing (EFTQC) architectures.
We show that, for the canonical task of phase estimation, in a regime of moderate scalability and using just over one million physical qubits, the reach'' of the quantum computer can be extended.
arXiv Detail & Related papers (2023-11-24T19:12:47Z) - Constant-Overhead Fault-Tolerant Quantum Computation with Reconfigurable
Atom Arrays [5.542275446319411]
We propose a hardware-efficient scheme to perform fault-tolerant quantum computation with high-rate qLDPC codes on reconfigurable atom arrays.
Our work paves the way for explorations of low-overhead quantum computing with qLDPC codes at a practical scale.
arXiv Detail & Related papers (2023-08-16T19:47:17Z) - Optimizing quantum gates towards the scale of logical qubits [78.55133994211627]
A foundational assumption of quantum gates theory is that quantum gates can be scaled to large processors without exceeding the error-threshold for fault tolerance.
Here we report on a strategy that can overcome such problems.
We demonstrate it by choreographing the frequency trajectories of 68 frequency-tunablebits to execute single qubit while superconducting errors.
arXiv Detail & Related papers (2023-08-04T13:39:46Z) - A High Performance Compiler for Very Large Scale Surface Code Computations [38.26470870650882]
We present the first high performance compiler for very large scale quantum error correction.
It translates an arbitrary quantum circuit to surface code operations based on lattice surgery.
The compiler can process millions of gates using a streaming pipeline at a speed geared towards real-time operation of a physical device.
arXiv Detail & Related papers (2023-02-05T19:06:49Z) - Building a fault-tolerant quantum computer using concatenated cat codes [44.03171880260564]
We present a proposed fault-tolerant quantum computer based on cat codes with outer quantum error-correcting codes.
We numerically simulate quantum error correction when the outer code is either a repetition code or a thin rectangular surface code.
We find that with around 1,000 superconducting circuit components, one could construct a fault-tolerant quantum computer.
arXiv Detail & Related papers (2020-12-07T23:22:40Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.