LLM-based Behaviour Driven Development for Hardware Design

• URL: http://arxiv.org/abs/2512.17814v2
• Date: Tue, 23 Dec 2025 08:00:41 GMT
• Title: LLM-based Behaviour Driven Development for Hardware Design
• Authors: Rolf Drechsler, Qian Liu,
• Abstract summary: Behavior Driven Development (BDD) has proven effective in software engineering, but its practical use remains limited.<n>Recent advances in Large Language Models (LLMs) offer new opportunities to automate this step.
• Score: 7.860405166035041
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Test and verification are essential activities in hardware and system design, but their complexity grows significantly with increasing system sizes. While Behavior Driven Development (BDD) has proven effective in software engineering, it is not yet well established in hardware design, and its practical use remains limited. One contributing factor is the manual effort required to derive precise behavioral scenarios from textual specifications. Recent advances in Large Language Models (LLMs) offer new opportunities to automate this step. In this paper, we investigate the use of LLM-based techniques to support BDD in the context of hardware design.

Related papers

• InternBootcamp Technical Report: Boosting LLM Reasoning with Verifiable Task Scaling [71.37579508777843]
  Large language models (LLMs) have revolutionized artificial intelligence by enabling complex reasoning capabilities.<n>To address this gap, we present InternBootcamp, an open-source framework comprising 1000+ domain-diverse task environments.
  arXiv  Detail & Related papers  (2025-08-12T05:00:00Z)
• Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verification [2.8236458753814233]
  This paper presents an agentic AI-based approach to hardware design verification.<n>Agentic AI-based approach empowers AI agents, in collaboration with Humain-in-the-Loop (HITL) intervention, to engage in a more dynamic, iterative, and self-reflective process.<n>This methodology is evaluated on five open-source designs, achieving over 95% coverage with reduced verification time.
  arXiv  Detail & Related papers  (2025-07-03T14:20:57Z)
• Machine-Learning-Assisted Photonic Device Development: A Multiscale Approach from Theory to Characterization [80.82828320306464]
  Photonic device development (PDD) has achieved remarkable success in designing and implementing new devices for controlling light across various wavelengths, scales, and applications.<n>PDD is an iterative, five-step process that consists of: i.e. deriving device behavior from design parameters, ii. simulating device performance, iv. fabricating the optimal device, and v. measuring device performance.<n>PDD suffers from large optimization landscapes, uncertainties in structural or optical characterization, and difficulties in implementing robust fabrication processes.<n>In this review, we present a comprehensive perspective on these methods to enable machine-learning-assisted PDD
  arXiv  Detail & Related papers  (2025-06-24T23:32:54Z)
• ML For Hardware Design Interpretability: Challenges and Opportunities [3.3540424603831323]
  We examine how design interpretability, particularly in RTL-to-NL tasks, influences the efficiency of the hardware design process.<n>We aim to guide future research in leveraging ML to automate RTL-to-NL tasks and improve hardware design interpretability.
  arXiv  Detail & Related papers  (2025-04-11T03:47:51Z)
• Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis [14.458529723566379]
  Large language models (LLMs) can be employed for programming languages such as Python and C++.<n>This paper explores leveraging LLMs to generate High-Level Synthesis (HLS)-based hardware design.
  arXiv  Detail & Related papers  (2025-02-19T17:53:59Z)
• HADES: Hardware Accelerated Decoding for Efficient Speculation in Large Language Models [1.2180334969164464]
  Large Language Models (LLMs) have revolutionized natural language processing by understanding and generating human-like text.<n>This paper introduces Hardware Accelerated Decoding (HADES), a novel approach to enhance the performance and energy efficiency of LLMs.
  arXiv  Detail & Related papers  (2024-12-27T21:19:01Z)
• Specifications: The missing link to making the development of LLM systems an engineering discipline [65.10077876035417]
  We discuss the progress the field has made so far-through advances like structured outputs, process supervision, and test-time compute.<n>We outline several future directions for research to enable the development of modular and reliable LLM-based systems.
  arXiv  Detail & Related papers  (2024-11-25T07:48:31Z)
• MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation [16.836658183451764]
  Large Language Models (LLMs) have recently shown promise in streamlining hardware design processes by encapsulating vast amounts of domain-specific data. Existing publicly available hardware datasets are often limited in size, complexity, or detail. We propose a Multi-Grained-Verilog (MG-Verilog) dataset, which encompasses descriptions at various levels of detail and corresponding code samples.
  arXiv  Detail & Related papers  (2024-07-02T03:21:24Z)
• LLM4SecHW: Leveraging Domain Specific Large Language Model for Hardware Debugging [4.297043877989406]
  This paper presents a novel framework for hardware debug that leverages domain specific Large Language Model (LLM) We propose a unique approach to compile a dataset of open source hardware design defects and their remediation steps. LLM4SecHW employs fine tuning of medium sized LLMs based on this dataset, enabling the identification and rectification of bugs in hardware designs.
  arXiv  Detail & Related papers  (2024-01-28T19:45:25Z)
• LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automation [74.7163199054881]
  Large Language Models (LLMs) have demonstrated their capability in context understanding, logic reasoning and answer generation. We present a systematic study on the application of LLMs in the EDA field. We highlight the future research direction, focusing on applying LLMs in logic synthesis, physical design, multi-modal feature extraction and alignment of circuits.
  arXiv  Detail & Related papers  (2023-12-28T15:09:14Z)
• Technology Readiness Levels for Machine Learning Systems [107.56979560568232]
  Development and deployment of machine learning systems can be executed easily with modern tools, but the process is typically rushed and means-to-an-end. We have developed a proven systems engineering approach for machine learning development and deployment. Our "Machine Learning Technology Readiness Levels" framework defines a principled process to ensure robust, reliable, and responsible systems.
  arXiv  Detail & Related papers  (2021-01-11T15:54:48Z)
• Technology Readiness Levels for AI & ML [79.22051549519989]
  Development of machine learning systems can be executed easily with modern tools, but the process is typically rushed and means-to-an-end. Engineering systems follow well-defined processes and testing standards to streamline development for high-quality, reliable results. We propose a proven systems engineering approach for machine learning development and deployment.
  arXiv  Detail & Related papers  (2020-06-21T17:14:34Z)

This list is automatically generated from the titles and abstracts of the papers in this site.

This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.