GPU-accelerated simulated annealing based on p-bits with real-world device-variability modeling

• URL: http://arxiv.org/abs/2601.14476v1
• Date: Tue, 20 Jan 2026 20:59:21 GMT
• Title: GPU-accelerated simulated annealing based on p-bits with real-world device-variability modeling
• Authors: Naoya Onizawa, Takahiro Hanyu,
• Abstract summary: Probabilistic computing using p-bits (p-bits) is an efficient alternative to CMOS logic for complex problem-solving.<n>This paper introduces a GPU-accelerated, open-source simulated framework based on p-bits.<n>By providing a scalable and accessible tool, this framework aims to advance research in probabilistic computing.
• Score: 1.2375561840897742
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Probabilistic computing using probabilistic bits (p-bits) presents an efficient alternative to traditional CMOS logic for complex problem-solving, including simulated annealing and machine learning. Realizing p-bits with emerging devices such as magnetic tunnel junctions (MTJs) introduces device variability, which was expected to negatively impact computational performance. However, this study reveals an unexpected finding: device variability can not only degrade but also enhance algorithm performance, particularly by leveraging timing variability. This paper introduces a GPU-accelerated, open-source simulated annealing framework based on p-bits that models key device variability factors -timing, intensity, and offset- to reflect real-world device behavior. Through CUDA-based simulations, our approach achieves a two-order magnitude speedup over CPU implementations on the MAX-CUT benchmark with problem sizes ranging from 800 to 20,000 nodes. By providing a scalable and accessible tool, this framework aims to advance research in probabilistic computing, enabling optimization applications in diverse fields.

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