Modular Simulation Framework for Process Variation Analysis of
MRAM-based Deep Belief Networks
- URL: http://arxiv.org/abs/2002.00897v1
- Date: Mon, 3 Feb 2020 17:20:21 GMT
- Title: Modular Simulation Framework for Process Variation Analysis of
MRAM-based Deep Belief Networks
- Authors: Paul Wood, Hossein Pourmeidani, and Ronald F. DeMara
- Abstract summary: Magnetic Random-Access Memory (MRAM) based p-bit neuromorphic computing devices are garnering increasing interest as a means to compactly and efficiently realize machine learning operations in machines Boltzmann Machines (RBMs)
Restrictedity of activation is dependent on the energy barrier of the MRAM device, and it is essential to assess the impact of process variation on the voltage-dependent behavior of the sigmoid function.
Here, transportable Python scripts are developed to analyze the output variation under changes in device dimensions on the accuracy of machine learning applications.
- Score: 2.0222827433041535
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Magnetic Random-Access Memory (MRAM) based p-bit neuromorphic computing
devices are garnering increasing interest as a means to compactly and
efficiently realize machine learning operations in Restricted Boltzmann
Machines (RBMs). When embedded within an RBM resistive crossbar array, the
p-bit based neuron realizes a tunable sigmoidal activation function. Since the
stochasticity of activation is dependent on the energy barrier of the MRAM
device, it is essential to assess the impact of process variation on the
voltage-dependent behavior of the sigmoid function. Other influential
performance factors arise from varying energy barriers on power consumption
requiring a simulation environment to facilitate the multi-objective
optimization of device and network parameters. Herein, transportable Python
scripts are developed to analyze the output variation under changes in device
dimensions on the accuracy of machine learning applications. Evaluation with
RBM circuits using the MNIST dataset reveal impacts and limits for processing
variation of device fabrication in terms of the resulting energy vs. accuracy
tradeoffs, and the resulting simulation framework is available via a Creative
Commons license.
Related papers
- A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCs [5.6496088684920345]
ReRAM-based accelerators process neural networks via analog Computing-in-Memory (CiM) for ultra-high energy efficiency.
This work explores the hardware implementation of the Sigmoid and SoftMax activation functions of neural networks with crossbarally binarized neurons.
We propose a complete ReRAM-based Analog Computing Accelerator (RACA) that accelerates neural network computation by leveraging inferenceally binarized neurons.
arXiv Detail & Related papers (2024-12-27T09:38:19Z) - Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics [0.0]
Physically unclonable cryptographic functions (PUFs) are used as low-cost primitives in device authentication and secret key creation.
Due to non-deterministic noise environment during the power-up process, PUFs are subject to low challenge-response repeatability.
arXiv Detail & Related papers (2024-12-02T14:47:37Z) - DeeR-VLA: Dynamic Inference of Multimodal Large Language Models for Efficient Robot Execution [114.61347672265076]
Development of MLLMs for real-world robots is challenging due to the typically limited computation and memory capacities available on robotic platforms.
We propose a Dynamic Early-Exit Framework for Robotic Vision-Language-Action Model (DeeR) that automatically adjusts the size of the activated MLLM.
DeeR demonstrates significant reductions in computational costs of LLM by 5.2-6.5x and GPU memory of LLM by 2-6x without compromising performance.
arXiv Detail & Related papers (2024-11-04T18:26:08Z) - A Realistic Simulation Framework for Analog/Digital Neuromorphic Architectures [73.65190161312555]
ARCANA is a spiking neural network simulator designed to account for the properties of mixed-signal neuromorphic circuits.
We show how the results obtained provide a reliable estimate of the behavior of the spiking neural network trained in software.
arXiv Detail & Related papers (2024-09-23T11:16:46Z) - Energy-efficient Task Adaptation for NLP Edge Inference Leveraging
Heterogeneous Memory Architectures [68.91874045918112]
adapter-ALBERT is an efficient model optimization for maximal data reuse across different tasks.
We demonstrate the advantage of mapping the model to a heterogeneous on-chip memory architecture by performing simulations on a validated NLP edge accelerator.
arXiv Detail & Related papers (2023-03-25T14:40:59Z) - Neural-PIM: Efficient Processing-In-Memory with Neural Approximation of
Peripherals [11.31429464715989]
This paper presents a new PIM architecture to efficiently accelerate deep learning tasks.
It is proposed to minimize the required A/D conversions with analog accumulation and neural approximated peripheral circuits.
Evaluations on different benchmarks demonstrate that Neural-PIM can improve energy efficiency by 5.36x (1.73x) and speed up throughput by 3.43x (1.59x) without losing accuracy.
arXiv Detail & Related papers (2022-01-30T16:14:49Z) - Nonprehensile Riemannian Motion Predictive Control [57.295751294224765]
We introduce a novel Real-to-Sim reward analysis technique to reliably imagine and predict the outcome of taking possible actions for a real robotic platform.
We produce a closed-loop controller to reactively push objects in a continuous action space.
We observe that RMPC is robust in cluttered as well as occluded environments and outperforms the baselines.
arXiv Detail & Related papers (2021-11-15T18:50:04Z) - Model of the Weak Reset Process in HfOx Resistive Memory for Deep
Learning Frameworks [0.6745502291821955]
We present a model of the weak RESET process in hafnium oxide RRAM.
We integrate this model within the PyTorch deep learning framework.
We use this tool to train Binarized Neural Networks for the MNIST handwritten digit recognition task.
arXiv Detail & Related papers (2021-07-02T08:50:35Z) - Efficient Micro-Structured Weight Unification and Pruning for Neural
Network Compression [56.83861738731913]
Deep Neural Network (DNN) models are essential for practical applications, especially for resource limited devices.
Previous unstructured or structured weight pruning methods can hardly truly accelerate inference.
We propose a generalized weight unification framework at a hardware compatible micro-structured level to achieve high amount of compression and acceleration.
arXiv Detail & Related papers (2021-06-15T17:22:59Z) - Bayesian Transformer Language Models for Speech Recognition [59.235405107295655]
State-of-the-art neural language models (LMs) represented by Transformers are highly complex.
This paper proposes a full Bayesian learning framework for Transformer LM estimation.
arXiv Detail & Related papers (2021-02-09T10:55:27Z) - SOT-MRAM based Sigmoidal Neuron for Neuromorphic Architectures [0.0]
In this paper, the intrinsic physical characteristics of spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) devices are leveraged to realize sigmoidal neurons in neuromorphic architectures.
Performance comparisons with the previous power- and area-efficient sigmoidal neuron circuits exhibit 74x and 12x reduction in power-area-product values for the proposed SOT-MRAM based neuron.
arXiv Detail & Related papers (2020-06-01T20:18:14Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.