A Backend-Agnostic MWIS Kernel for Stochastic Unit Commitment with Neutral-Atom Hardware Validation

• URL: http://arxiv.org/abs/2609.01248v1
• Date: Tue, 01 Sep 2026 13:46:26 GMT
• Title: A Backend-Agnostic MWIS Kernel for Stochastic Unit Commitment with Neutral-Atom Hardware Validation
• Abstract summary: We introduce a backend-agnostic computational interface that compiles the discrete decision layer of unit commitment into a move-based maximum-weight independent set problem.<n>We validate the approach in a green scheduling setting and deploy it on the QuEra Aquila neutral-atom quantum processor.<n>This is the first end-to-end industrial scheduling workflow that connects real operational decisions to programmable neutral-atom hardware.
• Score: 10.684735732603961
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Quantum hardware is beginning to address structured combinatorial optimisation, but two steps still block practical use: mapping real operational models onto hardware-compatible instances, and converting noisy hardware output back into feasible decisions. Here we introduce a backend-agnostic computational interface that compiles the discrete decision layer of stochastic unit commitment into a move-based maximum-weight independent set (MWIS) problem, while retaining continuous dispatch and feasibility recovery in the classical computational layer. We validate the approach in a green hydrogen scheduling setting and deploy it on the QuEra Aquila neutral-atom quantum processor. This is the first end-to-end industrial scheduling workflow that connects real operational decisions to programmable neutral-atom hardware through a solver-agnostic MWIS representation. Across a 15-day hardware campaign on 50-node instances, hardware-generated solutions after classical refinement match or exceed the dispatch margins obtained from exact MWIS on every day. When scaling to 144 nodes, encoding quality remains stable, while the probability that the full atom array survives, rather than graph embedding, emerges as the dominant bottleneck to further scaling. Together, these results establish a hardware-compatible computational pathway toward larger problem scales, and lay the groundwork for exploring regimes in which exact classical optimisation may no longer scale efficiently.

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